h5ps2g43mfp Hynix Semiconductor, h5ps2g43mfp Datasheet - Page 12

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h5ps2g43mfp

Manufacturer Part Number
h5ps2g43mfp
Description
2gb Ddr2 Sdram
Manufacturer
Hynix Semiconductor
Datasheet
Rev. 0.3 / May 2008
3.2 DC & AC Logic Input Levels
3.2.1 Input DC Logic Level
3.2.2 Input AC Logic Level
3.2.3 AC Input Test Conditions
Note:
1. Input waveform timing is referenced to the input signal crossing through the V
2. The input signal minimum slew rate is to be maintained over the range from V
3. AC timings are referenced with input waveforms switching from VIL(ac) to VIH(ac) on the positive transitions
Symbol
V
V
V
IH
IL
SWING(MAX)
under test.
edges and the range from V
and VIH(ac) to VIL(ac) on the negative transitions.
Symbol
Symbol
V
V
(ac)
(ac)
SLEW
IH
IL
V
V
REF
(dc)
(dc)
SWING(MAX)
Falling Slew =
ac input logic HIGH VREF + 0.250
ac input logic LOW
Parameter
delta TF
Input signal maximum peak to peak swing
dc input logic HIGH
dc input logic LOW
V
< Figure : AC Input Test Signal Waveform>
Input signal minimum slew rate
Parameter
REF
delta TF
REF
Input reference voltage
- V
to V
IL(ac)
Condition
Min.
IL(ac)
DDR2 400,533
-
max
max for falling edges as shown in the figure below.
VREF - 0.250
VREF + 0.125
Max.
-
Min.
- 0.3
delta TR
VREF + 0.200
Rising Slew =
Min.
DDR2 667,800
-
VREF - 0.125
VDDQ + 0.3
0.5 * V
Max.
Value
1.0
1.0
VREF - 0.200
DDQ
REF
REF
Max.
V
to V
level applied to the device
-
IH(ac)
IH(ac)
delta TR
min - V
Units
Units
V/ns
H5PS2G43MFP
H5PS2G83MFP
min for rising
V
V
V
V
V
V
V
V
V
V
V
Units
DDQ
IH(dc)
REF
IH(ac)
IL(dc)
IL(ac)
SS
V
V
REF
max
max
min
min
Notes
Notes
Notes
2, 3
1
1
12

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