h57v2562gtr Hynix Semiconductor, h57v2562gtr Datasheet - Page 4
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h57v2562gtr
Manufacturer Part Number
h57v2562gtr
Description
256mb Synchronous Dram Based 4bank
Manufacturer
Hynix Semiconductor
Datasheet
1.H57V2562GTR.pdf
(23 pages)
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256Mb Synchronous DRAM(16M x 16) FEATURES
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ORDERING INFORMATION
Note:
1. H57V2562GTR-XXC Series: Normal power & Commercial temp.
2. H57V2562GTR-XXL Series: Low Power & Commercial temp.
Rev 1.0 / Aug. 2009
H57V2562GTR-60C
H57V2562GTR-75C
H57V2562GTR-50C
H57V2562GTR-60L
H57V2562GTR-75L
H57V2562GTR-50L
This product is in compliance with the directive pertaining of RoHS.
Standard SDRAM Protocol
Internal 4bank operation
Power Supply Voltage : V
All device pins are compatible with LVTTL interface
Low Voltage interface to reduce I/O power
8,192 Refresh cycles / 64ms
Programmable CAS latency of 2 or 3
Programmable Burst Length and Burst Type
Commercial Temp : 0
Package Type : 54_Pin TSOPII
Part Number
- 1, 2, 4 or 8 for Interleave Burst
- 1, 2, 4, 8 or full page for Sequential Burst
o
Frequency
C ~ 70
166MHz
133MHz
200MHz
166MHz
133MHz
200MHz
Clock
DD
= 3.3V, V
o
C Operation
Latency
DDQ
CAS
3
3
3
3
3
3
= 3.3V
Power
Normal
Power
Low
Voltage
3.3V
Synchronous DRAM Memory 256Mbit
4Banks x 4Mbits
Organization
x16
H57V2562GTR Series
Interface
LVTTL
4