ta1317afg TOSHIBA Semiconductor CORPORATION, ta1317afg Datasheet - Page 48

• Manufacturer Part Number: ta1317afg
• Description: Deflection Processor Ic For Tv
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Note
No.
32
33
34
35
36
37
Vertical DF phase adjustment
(V DF phase)
LVP detection voltage
Vertical guard detection
voltage
Vertical guard detection
output current
(BLK-OUT output current)
Vertical centering DAC output
voltage 1 (V centering)
Vertical centering DAC output
voltage 2 (V shift)
Parameter
SW6
OFF
OFF
OFF
OFF
OFF
OFF
SW7
C
C
B
B
B
A
SW8
OFF
ON
ON
ON
ON
ON
SW10
Test Condition
OFF
OFF
OFF
OFF
OFF
OFF
SW Mode
SW13
B
B
B
B
B
B
SW14
ON
ON
ON
ON
ON
ON
SW21
48
A
B
A
A
A
A
SW30
A
A
A
A
A
A
(1) Input vertical trigger pulse to pin V
(2) Set V-DF PHASE (sub-address: 06) to minimum (data: 08) and measure pin 22
(3) Set V-DF PHASE (sub-address: 06) to maximum (data: F8) and measure pin 22
(4) Calculate change amount T
(1) Connect external supply voltage V
(2) Decrease external supply voltage V
(1) Connect external supply voltage V
(2) Switch to VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Increase external supply voltage V
(4) Decrease external supply voltage V
(1) Connect external supply voltage V
(2) Measure pin 24 (BLK OUT) voltage V
(1) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(2) Set V CENTERING (sub-address: 05) to minimum (data: 00) and measure pin 2
(3) Set V CENTERING (sub-address: 05) to maximum (data: FE) and measure pin 2
(1) Set VD (sub-address: 00) to DC-Coupling mode (data: 80).
(2) Set V SHIFT (sub-address: 01) to minimum (data: 80) and measure pin 2 (CENTER
(3) Set V SHIFT (sub-address: 01) to maximum (data: 83) and measure pin 2
Pulse level (VT) = 3.0 V
(V-DF OUT) phase T
(V-DF OUT) phase T
T
changes from 0 to 1, measure TP21 voltage V
changes from 0 to 1, measure TP7 voltage V
changes from 0 to 1, measure TP7 voltage V
following formula.
(CENTER DAC) voltage V
(CENTER DAC) voltage V
DAC) voltage V
(CENTER DAC) voltage V
I
VD
24
(unless otherwise specified, V
=
= T
10 k Ω
VD
V
24
(08) + T
CD
(80).
VD
VD
VD
(F8)
(08).
(F8).
CA
CA
CD
VD
(00).
(FE).
(83).
using the following formula.
CC
Test Method
IN
8
7
7
7
= 9 V, Ta = 25 ± 3°C, data = preset values)
8
7
.
to TP21 (LVP).
to TP7 (V NF).
= 8 V to TP7 (V NF).
from 5.5 V. When D3 data in Read mode
from 9 V. When D5 data in Read mode
from 5.5 V. When D3 data in Read mode
24
and calculate output current (I
VGH
VGL
LVP
.
.
.
TA1317AFG
2005-08-18
24
) using the