k6r4004v1d Samsung Semiconductor, Inc., k6r4004v1d Datasheet
k6r4004v1d
Related parts for k6r4004v1d
k6r4004v1d Summary of contents
Page 1
... K6R4004V1D Document Title 1Mx4 Bit High Speed Static RAM(3.3V Operating). Operated at Commercial and Industrial Temperature Ranges. Revision History Rev No. History Rev. 0.0 Initial release with Preliminary. Rev. 0.1 Add Low Ver. Rev. 1.0 Change Icc, Isb and Isb1 Item 8ns 10ns I CC(Commercial) 12ns 15ns ...
Page 2
... K6R4004V1D 4Mb Async. Fast SRAM Ordering Information Org. Part Number K6R4004C1D-J(K)C( K6R4004V1D-J(K)C(I) 08/10 K6R4008C1D-J(K,T,U)C(I) 10 512K x8 K6R4008V1D-J(K,T,U)C(I) 08/10 K6R4016C1D-J(K,T,U,E)C(I) 10 256K x16 K6R4016V1D-J(K,T,U,E)C(I,L,P) 08/10 VDD(V) Speed ( ns ) PKG 32-SOJ K : 32-SOJ(LF) 3.3 8/ 36-SOJ K : 36-SOJ(LF 44-TSOP2 3.3 8/ 44-TSOP2(LF 44-SOJ K : 44-SOJ(LF 44-TSOP2 U : 44-TSOP2(LF) 3.3 8/ 48-TBGA - 2 - PRELIMINARY CMOS SRAM Temp. & Power ...
Page 3
... The K6R4004V1D is a 4,194,304-bit high-speed Static Random Access Memory organized as 1,048,576 words by 4 bits. The K6R4004V1D uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG′s advanced CMOS process and designed for high-speed circuit technology ...
Page 4
... K6R4004V1D ABSOLUTE MAXIMUM RATINGS* Parameter Voltage on Any Pin Relative Voltage on V Supply Relative Power Dissipation Storage Temperature Operating Temperature Commercial Industrial * Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied ...
Page 5
... OHZ PRELIMINARY CMOS SRAM Value 3ns 1.5V See below , t & OLZ OHZ +3.3V 319Ω D OUT 353Ω 5pF* K6R4004V1D-10 Unit Min Max Rev 2 ...
Page 6
... PU 50% (Max.) is less than t (Min.) both for a given device and from device IL PRELIMINARY CMOS SRAM K6R4004V1D-10 Unit Max - ...
Page 7
... K6R4004V1D TIMING WAVEFORM OF WRITE CYCLE(1) Address ...
Page 8
... K6R4004V1D NOTES(WRITE CYCLE) 1. All write cycle timing is referenced from the last valid address to the first transition address write occurs during the overlap of a low CS and WE. A write begins at the latest transition CS going low and WE going low ; A write ends at the earliest transition CS going high or WE going high ...
Page 9
... K6R4004V1D PACKAGE DIMENSIONS 32-SOJ-400 #32 11.18 ±0.12 0.440 ±0.005 #1 +0.10 0.43 -0.05 0. +0.004 0.017 0.0375 -0.002 #17 #16 21.36 MAX 0.841 20.95 ±0.12 0.825 ±0.005 1.30 ( 0.051 1.30 ( 0.051 +0.10 0.71 -0.05 1.27 +0.004 0.028 0.050 -0.002 - 9 - PRELIMINARY CMOS SRAM Units:millimeters/Inches 9.40 ±0.25 0.370 ±0.010 +0.10 0.20 -0.05 +0.004 0.008 -0.002 0.69 MIN 0.027 ) 0.10 3.76 MAX MAX 0.004 ) 0 ...