m62320gp Renesas Electronics Corporation., m62320gp Datasheet - Page 6

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m62320gp

Manufacturer Part Number
m62320gp
Description
8-bit I/o Expander For I2c Bus
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M62320GP
Digital Data Format
1. Write mode: I
First
2. Read mode: Parallel data input to I
First
• S: Start condition
• Slave address
Note:
• W: Write (SDA = Low), R: Read (SDA = High)
• A: Acknowledge bit
• I/O setting data (I/O setting of parallel data I/O terminals.)
Note:
• 8-bit data
• P: Stop condition
REJ03D0909-0100 Rev.1.00 Mar 25, 2008
Page 6 of 10
S
S
First
MSB
First
MSB
First
MSB
P7
D7
0
Slave address
Slave address
While SCL level is high, SDA level should be changed from low to high.
While SCL level is high, SDA line level should be changed from high to low.
Lower three bits (A0, A1, A2) are a programmable
address. This IC is accessed only when the lower 3
bits data of slave address coincide with the data of
CS0 to CS2. (refer to the right table)
DATA INPUT from parallel data terminals = Low
DATA OUTPUT to parallel data terminals = High
Each bit data corresponds to the I/O state of the parallel data terminals.
P6
D6
1
P5
D5
2
1
C BUS data input to parallel data output
Transmission from Master (MCU etc.) to Slave (M62320GP)
Transmission from Slave (M62320GP) to Master (MCU etc.)
W
W
P4
D4
1
A
A
A2
P3
D3
8-bit data
I/O setting
2
C BUS data output
A1
P2
D2
A0
P1
D1
Last
LSB
A
A
8-bit data
P0
D0
Last
LSB
Last
LSB
8-bit data
A
Chip select data
MSB
Note: L = Low, H = High
A2
0
0
0
1
:
8-bit data
A
A1
8-bit data
0
0
1
1
:
A
A0
LSB
0
1
0
1
:
…..
A
CS2
H
L
L
L
:
8-bit data
…..
CS1
H
H
L
L
:
A
A
CS0
Last
Last
H
H
L
L
:
P
P

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