74HC04DR2G ON Semiconductor, 74HC04DR2G Datasheet

IC HEX INVERTER CMOS 14-SOIC

74HC04DR2G

Manufacturer Part Number
74HC04DR2G
Description
IC HEX INVERTER CMOS 14-SOIC
Manufacturer
ON Semiconductor
Series
74HCr
Datasheet

Specifications of 74HC04DR2G

Logic Type
Inverter
Number Of Inputs
1
Number Of Circuits
6
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logical Function
Inverter
Logic Family
HC
Number Of Elements
6
High Level Output Current
-5.2mA
Low Level Output Current
5.2mA
Propagation Delay Time
110ns
Operating Supply Voltage (typ)
2.5/3.3/5V
Package Type
SOIC
Operating Temp Range
-55C to 125C
Pin Count
14
Quiescent Current
2uA
Technology
CMOS
Mounting
Surface Mount
Operating Temperature Classification
Military
Operating Supply Voltage (max)
6V
Operating Supply Voltage (min)
2V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC04DR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC04DR2G
Manufacturer:
ON Semiconductor
Quantity:
20
74HC04
Hex Inverter
High−Performance Silicon−Gate CMOS
The device inputs are compatible with Standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
Features
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
The 74HC04 is identical in pinout to the LS04 and the MC14069.
The device consists of six three−stage inverters.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7A Requirements
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 36 FETs or 9 Equivalent Gates
These are Pb−Free Devices
Pinout: 14−Lead Packages (Top View)
V
A1
14
CC
1
A1
A2
A3
A4
A5
A6
A6
Y1
13
2
1
3
5
9
11
13
LOGIC DIAGRAM
Y6
A2
12
3
A5
Y2
11
4
Y5
A3
10
5
10
12
2
4
6
8
Y1
Y2
Y3
Y4
Y5
Y6
A4
Y3
9
6
Y = A
GND
Y4
8
7
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
14
14
(Note: Microdot may be in either location)
1
1
ORDERING INFORMATION
HC04
A
WL or L = Wafer Lot
Y
WW or W = Work Week
G or G
Inputs
http://onsemi.com
FUNCTION TABLE
A
H
L
CASE 948G
CASE 751A
DT SUFFIX
TSSOP−14
D SUFFIX
SOIC−14
= Device Code
= Assembly Location
= Year
= Pb−Free Package
Publication Order Number:
14
Outputs
1
14
DIAGRAMS
Y
H
L
1
MARKING
AWLYWW
HC04G
ALYW G
HC
04
74HC04/D
G

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74HC04DR2G Summary of contents

Page 1

Hex Inverter High−Performance Silicon−Gate CMOS The 74HC04 is identical in pinout to the LS04 and the MC14069. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The device consists of ...

Page 2

... Input Rise and Fall Time r f (Figure 1) ORDERING INFORMATION Device 74HC04DR2G 74HC04DTR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. Parameter and GND Pins ...

Page 3

... Maximum Low−Level Output OL Voltage I Maximum Input Leakage in Current I Maximum Quiescent Supply CC Current (per Package) NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). AC CHARACTERISTICS (C = 50pF, Input t L Symbol Parameter t , Maximum Propagation Delay, Input Output Y PLH ...

Page 4

INPUT A 50% 10% t PLH 90% OUTPUT Y 50% 10% t TLH Figure 1. Switching Waveforms OUTPUT DEVICE UNDER TEST *Includes all probe and jig capacitance Figure 2. Test Circuit A Figure 3. Expanded ...

Page 5

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 6

... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 7

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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