w66910 Winbond Electronics Corp America, w66910 Datasheet - Page 64

• Manufacturer Part Number: w66910
• Description: Te Mode Isdn S/t-controller With Microprocessor Interface
• Manufacturer: Winbond Electronics Corp America

IC2 IC2 Synchronous Transfer Interrupt
When enabled, an interrupt is generated at end of GCI IC2 time slot every GCI frame (125 s).
CI1 GCI CI1 Synchronous Transfer Interrupt
When enabled, an interrupt is generated when there is a change in the received CIR1_6-1 code without double last look criterion.
8.1.46 GCI Extended Interrupt Mask Register
Value after reset: F7H
Bits 7-5 are fixed at "1" and bit 3 is fixed at '0". This means MO0C interrupt cannot be masked. The interrupt is disabled when
the bit is set.
8.2 B1 HDLC controler
TABLE 8.3 REGISTER ADDRESS MAP: B1 CHANNEL HDLC
Section Offset
8.2.10
8.2.11
8.2.12
8.2.13
8.2.14
8.2.1
8.2.2
8.2.3
8.2.4
8.2.5
8.2.6
8.2.7
8.2.8
8.2.9
7
1
2A
2B
2C
2D
20
21
22
23
24
25
26
27
28
29
6
1
R_clear B1_EXIR
Access Register Name
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R
R
R
5
1
B1_RFIFO
B1_XFIFO
B1_CMDR
B1_MODE
B1_EXIM
B1_STAR
B1_ADM1
B1_ADM2
B1_ADR1
B1_ADR2
B1_RBCL
B1_RBCH
B1_IDLE
MO1C
4
Description
B1 channel receive FIFO
B1 channel transmit FIFO
B1 channel command register
B1 channel mode control
B1 channel extended interrupt
B1 channel extended interrupt mask
B1 channel status register
B1 channel address mask 1
B1 channel address mask 2
B1 channel address 1
B1 channel address 2
B1 channel receive frame byte count low
B1 channel receive frame byte count high
B1 channel transmit idle pattern
3
0
IC1
2
-64 -
GCI_EXIM Read/Write Address 4BH
IC2
1
W66910 PCI ISDN S/T-Controller
CI1
0
Publication Release Date:
Data Sheet
Revision 1.0
Feb,2001