ne568a NXP Semiconductors, ne568a Datasheet - Page 4

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ne568a

Manufacturer Part Number
ne568a
Description
150mhz Phase-locked Loop
Manufacturer
NXP Semiconductors
Datasheet

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1. 18pF with Pin 12 ground and Pin 13 no connect (open).
2. C
3. For 50 setup. R
4. For test configuration R
5. 0 chip resistors (jumpers) may be substituted with minor degra-
Philips Semiconductors
At 70MHz, the calculated value is 45pF. Empirical results with the
test and application board were improved when a 47pF capacitor
was used.
The natural frequency for the loop filter is set by C
center frequency of the loop is 70MHz and the full demodulated
bandwidth is desired, i.e., f
chosen, the value of C
Also,
This capacitance determines the signal bandwidth of the output
buffer amplifier. (For further inofrmation see Philips application note
AN1881 “The NE568A Phase Locked Loop as a Wideband Video
Demodulator”.
Parts List and Layout 40MHz Application NE568AD
NOTES:
1996 Feb 1
C
C
C
C
C
C
C
C
C
C
C
C
C
C
R
R
R
R
R
RFC
RFC
150MHz phase-locked loop
1
2
2
3
4
5
6
7
8
9
10
11
12
13
1
2
3
4
5
with R
dation of performance.
1
2
3
4
3
2
1
2
5
5
+ C
4
C
C
C
STRAY
= 3.9k .
9
10
11
100nF
100nF
100nF
100nF
100nF
100nF
560pF
100nF
100nF
6.8 F
1.2k
3.9k
10 H
10 H
18pF
16pF
47pF
47pF
27
43
50
+
+
+
= 16pF for temperature-compensated configuration
2p (50) (f
2p R
2p350Wf
1
10
1
1
= 62 , R
1
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
2%
2%
2%
2%
2%
1
can be calculated.
f
BW
BW
4
BW(Hz)
O
= 0 (GND) and C
)
= f
F
F
Ceramic chip
Ceramic chip
Ceramic ORChip
Ceramic chip
Ceramic chip
Tantalum
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Chip CR32
Trim pot
Chip CR32
Chip CR32
Chip CR32
Surface mount
Surface mount
3
O
= 75 for 75 application.
/7 = 10MHz, and a value for R
2
= 18pF.
10
and R
0805 or 1206
0805 or 1206
0805 or 1206
1206
0805
1206
1206
1206
1206
1206
1206
1206
1/4W
1/4W
1/4W
1/4W
35V
1
. If the
1
is
4
1. 18pF with Pin 12 ground and Pin 13 no connect (open).
2. C
3. For 50 setup. R
4. For test configuration R
Parts List and Layout 70MHz Application NE568AN
NOTES:
C
C
C
C
C
C
C
C
C
C
C
C
C
C
R
R
R
R
R
RFC
RFC
1
2
2
3
4
5
6
7
8
9
10
11
12
13
1
2
3
4
5
with R
1
2
3
4
3
2
1
2
+ C
4
STRAY
= 3.9k .
100nF
100nF
100nF
100nF
100nF
100nF
560pF
100nF
100nF
1.2k
3.9k
6.8 F
10 H
10 H
18pF
16pF
47pF
47pF
27
43
50
= 16pF for temperature-compensated configuration
1
= 62 , R
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
10%
2%
2%
2%
2%
2%
4
= 0 (GND) and C
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Tantalum
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic chip
Ceramic
CR32
Trim pot
Ceramic
CR32
Ceramic
CR32
Ceramic
CR32
Surface mount
Surface mount
3
= 75 for 75 application.
NE/SA568A
chip
chip
chip
chip
2
Product specification
= 18pF.
1/4W
1/4W
1/4W
1/4W
0805
50V
50V
50V
50V
35V
50V
50V
50V
50V
50V
50V
50V
50V

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