ppc440epx-nta667t ETC-unknow, ppc440epx-nta667t Datasheet - Page 80

• Manufacturer Part Number: ppc440epx-nta667t
• Description: Mpu 440epx Risc 32-bit 0.13um 667mhz 1.8v/2.5v/3.3v 680-pin Tebga Tray
• Manufacturer: ETC-unknow

440EPx – PPC440EPx Embedded Processor
Table 21. I/O Specifications—PCI, USB, UART, IIC, SPI, Ethernet, System and Debug Interfaces (Sheet 2 of 3)
Notes:
1. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
2. SMIISync is a weak driver. Redrive SMIISync when driving more than one load.
3. TDO timing is referenced to the falling edge of TCK.
80
Ethernet SMII Interface
SMIISync
SMII0RxD
SMII1RxD
SMII0TxD
SMII1TxD
Internal Peripheral Interface
IIC0SClk
IIC0SData
IIC1SClk
IIC1SData
SCPClkOut
SCPDI
SCPDO
UARTn_Rx
UARTn_Tx
UARTn_DCD
UARTn_DSR
UARTn_CTS
UARTn_DTR
UARTn_RI
UARTn_RTS
USB2Xcvr
USB2Xcvr
USB2DI0:7
USB2DO0:7
USB2LS0:1
USB2OM0:1
USB2RxAct
USB2RxDV
USB2RxErr
USB2Susp
USB2TermSel
USB2TxRdy
USB2TxVal
USB2XcvrSel
Interrupts Interface
IRQ0:9
JTAG Interface
TCK
TDI
TDO
TMS
TRST
Signal
Setup Time
(T
IS
1.5
1.5
5
4
4
4
4
2
2
min)
Input (ns)
Hold Time
(T
IH
1.5
5.5
5.5
1
1
0
0
0
0
min)
Valid Delay
(T
OV
9.5
3
3
3
5
5
6
4
4
4
4
4
4
4
4
max)
Output (ns)
Hold Time
(T
OH
1
1
1
0
0
0
1
1
1
1
1
1
1
1
1
min)
(minimum)
USB 2.0
USB 2.0
Output Current (mA)
I/O H
19.1
19.1
19.1
14.6
14.6
19.1
19.1
19.1
19.1
19.1
19.1
5.1
5.1
5.1
5.1
5.1
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
n/a
Revision 1.30 – February 27, 2009
(minimum)
USB 2.0
USB 2.0
I/O L
12.8
12.8
12.8
12.8
12.8
12.8
10.2
6.8
6.8
6.8
6.8
6.8
n/a
8.7
n/a
n/a
n/a
8.7
n/a
8.7
6.6
6.6
n/a
8.7
n/a
n/a
8.7
8.7
8.7
n/a
8.7
8.7
n/a
n/a
n/a
n/a
n/a
n/a
SMIIRefClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
SMIIRefClk
SCPClkOut
SCPClkOut
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
USB2Clk
IIC0SClk
IIC1SClk
40MHz
Clock
Data Sheet
TCK
TCK
TCK
AMCC Proprietary
Notes
async
async
async
async
async
async
async
async
async
Max
2
3