am53c94 Advanced Micro Devices, am53c94 Datasheet - Page 37

• Manufacturer Part Number: am53c94
• Description: High Performance Scsi Controller
• Manufacturer: Advanced Micro Devices

Status Register (STATREG) 04H will be set. This com-
mand is cleared from the command queue once it is
decoded.
Caution must be exercised when using this command.
The DMA Stop Command can be used only during a
DMA Target Send Data Command or DMA Target Re-
ceive Data Command execution. In both cases the DMA
controller has to be in the idle state.
During a DMA Target Send Data Command the FIFO
has to be empty or the Current FIFO (CF 4:0) bits in the
Current FIFO/Internal State Register (CFISREG) 07H
are zero.
During a DMA Synchronous Target Receive Data Com-
mand the Current Transfer Count Register (CTCREG)
00–01H is zero, which is indicated by the Count to Zero
(CTZ) bit of the Status Register (STATREG) 04H. or
when the Synchronous Offset Register (SOFREG) 07H
has reached its maximum value which is indicated by
the Synchronous Offset Flag (SOF) bit of the Internal
State Register (ISREG) 06H.
During a DMA Asynchronous Target Receive Data
Command the FIFO is full which is indicated by the Cur-
rent FIFO (CF 4:0) bits in the Current FIFO/Internal
State Register (CFISREG) 07H being all high or Current
Transfer Count Register (CTCREG) 00–01H is zero,
which is indicated by the Count to Zero (CTZ) bit of the
Status Register (STATREG) 04H.
Idle State Commands
The Idle State Commands can be issued to the device
only when the device is disconnected from the SCSI
bus. If these commands are issued to the device when it
is logically connected to the SCSI bus, the commands
are ignored, and the device will generate an illegal com-
mand interrupt and clear the Command Register
(CMDREG) 03H.
Reselect Steps Command
(Command Code 40H/C0H)
The Reselect Steps Command is used by the target de-
vice to reselect an initiator device. When this command
is issued the device arbitrates for the control of the SCSI
bus. If the device wins arbitration, it reselects the initia-
tor device and transfers a single byte identify message.
Before issuing this command the SCSI Timeout Regis-
ter (STIMREG) 05H, the Control Register One
(CNTLREG1) 08H and the SCSI Destination ID Regis-
ter (SDIDREG) 04H must be set to the proper values. If
DMA is enabled, the Start Transfer Count Register
(STCREG) 00H–01H must be set to one. If DMA is not
enabled, the single byte identify message must be
loaded into the FIFO before issuing this command. This
command will be terminated early if the SCSI Timeout
Register times out. This command also resets the Inter-
nal State Register (ISREG) 06H.
P R E L I M I N A R Y
Am53C94/Am53C96
Select without ATN Steps Command
(Command Code 41H/C1H)
The Select without ATN Steps Command is used by the
initiator to select a target. When this command is issued
the device arbitrates for the control of the SCSI bus.
When the device wins arbitration, it selects the target
device and transfers the Command Descriptor Block
(CDB). Before issuing this command the SCSI Timeout
Register (STIMREG) 05H, the Control Register One
(CNTLREG1) 08H and the SCSI Destination ID Regis-
ter (SDIDREG) 04H must be set to the proper values. If
DMA is enabled, the Start Transfer Count Register
(STCREG) 00H–01H must be set to the total length of
the command. If DMA is not enabled, the data must be
loaded into the FIFO before issuing this command. This
command will be terminated early if the SCSI Timeout
Register times out or if the target does not go to the
Command Phase following the Selection Phase or if the
target exits the Command Phase early.
Select with ATN Steps Command
(Command Code 42H/C2H)
The Select with ATN Steps Command is used by the in-
itiator to select a target. When this command is issued
the device arbitrates for the control of the SCSI bus.
When the device wins arbitration, it selects the target
device with the ATN signal asserted and transfers the
Command Descriptor Block (CDB) and a one byte mes-
sage. Before issuing this command the SCSI Timeout
Register (STIMREG) 05H, the Control Register One
(CNTLREG1) 08H and the SCSI Destination ID Regis-
ter (SDIDREG) 04H must be set to the proper values. If
DMA is enabled, the Start Transfer Count Register
(STCREG) 00H–01H must be set to the total length of
the command. If DMA is not enabled, the data must be
loaded into the FIFO before issuing this command. This
command will be terminated early in the following situ-
ations:
Select with ANT and Stop Steps Command
(Command Code 43H/C3H)
The Select with ATN and Stop Steps Command is used
by the initiator to select a target. When this command is
issued the device arbitrates for the control of the SCSI
bus. When the device wins arbitration, it selects the tar-
get device with the ATN signal asserted and transfers
the Command Descriptor Block (CDB) and stops after
one message byte is sent, but the ATN signal is not
The SCSI Timeout Register times out
The target does not go to the Message Out Phase
following the Selection Phase
The target exits the Message Phase early
The target does not go to the Command Phase
following the Selection Phase
The target exits the Command Phase early.
AMD
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