psd934f2v-20mi STMicroelectronics, psd934f2v-20mi Datasheet - Page 26
psd934f2v-20mi
Manufacturer Part Number
psd934f2v-20mi
Description
Flash In-system Programmable Isp Peripherals For 8-bit Mcus
Manufacturer
STMicroelectronics
Datasheet
1.PSD934F2V-20MI.pdf
(94 pages)
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The
PSD9XX
Functional
Blocks
(cont.)
22
PSD9XX Family
Figure 3. Data Polling Flow Chart
9.1.1.6.2 Data Toggle
Checking the Data Toggle bit on DQ6 is a method of determining whether a Program or
Erase instruction is in progress or has completed. Figure 4 shows the Data Toggle
algorithm.
When the MCU issues a programming instruction, the embedded algorithm within the
PSD9XX begins. The MCU then reads the location of the byte to be programmed in
Flash to check status. Data bit DQ6 of this location will toggle each time the MCU reads
this location until the embedded algorithm is complete. The MCU continues to read this
location, checking DQ6 and monitoring the Error bit on DQ5. When DQ6 stops toggling
(two consecutive reads yield the same value), and the Error bit on DQ5 remains ‘0’, then
the embedded algorithm is complete. If the Error bit on DQ5 is ‘1’, the MCU should test
DQ6 again, since DQ6 may have changed simultaneously with DQ5 (see Figure 4).
The Error bit at DQ5 will be set if either an internal timeout occurred while the embedded
algorithm attempted to program the byte, or if the MCU attempted to program a ‘1’ to a bit
that was not erased (not erased is logic ‘0’).
NO
READ DQ5 & DQ7
Reset Instruction
Complete, Issue
at Valid Address
Program/Erase
Operation Not
READ DQ7
START
DATA7
DATA
FAIL
DQ5
DQ7
DQ7
=1
=
=
YES
NO
NO
YES
YES
Program/Erase
Operation is
Complete
PASS
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