ixld02 IXYS Corporation, ixld02 Datasheet - Page 3

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ixld02

Manufacturer Part Number
ixld02
Description
Ixld02si Differential 2a Ultra Fast Laser Diode Driver
Manufacturer
IXYS Corporation
Datasheet

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Part Number
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Quantity
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Part Number:
ixld02SI
Manufacturer:
PANASONIC
Quantity:
24 000
Recommended Operating Conditions
Unless otherwise noted, VDD=VDDA=5V, T
I
T
T
VDDA Analog bias supply input voltage
OUT
Name
f
P
V
I
VDD Logic supply input voltage
FINmax
OFFDLY
V
R
V
VTT
V
t
I
ONDLY
I
t
OUTB
V
I
t
V
I
t
V
Wmax
OUTB
I
PDN
RST
OUT
IPW
PW
IOP
LIN
FIN
t
T
OUT
t
VTT
IBI
IPW
IOP
IBI
R
F
/I
IH
IL
j
IOP
Internal bias voltage input
VTT terminal resistance
Internal bias current input range
Measured IBI terminal voltage
Pulse width programming current input
range.
Measured IPW terminal voltage
I
OUT and OUTB output current, I
programming current.
Measured IOP terminal voltage
Output current to programming current gain
Logic input high threshold for PDN, RST, &
FIN inputs.
Logic input high threshold for PDN, RST, &
FIN inputs.
Logic input bias current for PDN, RST, &
FIN inputs.
IXLD02 power down delay, V
to high transition.
IXLD02 power up delay, V
low transition.
IXLD02 reset logic delay, V
high transition.
IXLD02 reset logic delay, V
high transition.
IXLD02 pulse frequency input, V
low to high transition to I
Maximum pulse frequency, FIN, logic input.
Peak true pulse current output.
Rise time
Fall time
On-time propagation delay
Off-time propagation delay
Pulse width maximum
Jitter
OUT terminal voltage
Minimum complement pulse current output.
OUTB terminal voltage
OUT
=2A peak, Output current pulse width
Definition
OUT
PDN
RST
RST
pulse delay.
PDN
logical high to
C
logical low to
logical low to
=25C
FIN,
OUT
logical low
logical
,
0.7*VDD
1800
Min
4.5
4.5
0.6
0.6
0.6
-10
1.6
30
10
17
-1
2
0
8
0
8
VDDA/2
3
2000
<300
Typ
100
100
100
100
600
600
0.2
50
50
30
50
30
30
>1
1
1
2
.3*VDD
2200
Max
300
400
5.5
5.5
1.7
1.7
1.7
2.4
0.4
70
10
12
12
3
3
Kohms Measured with VDDin=VDDA=0V.
Amps I
Amps I
Units
MHz I
mA
uA
uA
uA
ns
ns
ns
ns
ns
ns
ps
ps
ns
ns
us
ps
I/I
V
V
V
V
V
V
V
V
V
V
Measured with Zin>10meg DVM.
External current source between
VDDA and IBI terminal.
I
External current source between
VDDA and IPW terminal.
I
I
External current source between
VDDA and IBI terminals.
IBI=100uA.
I
For logic inputs, PDN, RST, & FIN
held at:-0.5V<V
I
V
I
1.4A<I
V
I
0A<I
IBI
IPW
IBI
IOP
IBI
IBI
IBI
IBI
IBI
IBI
OUT
OUT
=100uA.
=400uA, I
=400uA, I
=400uA, I
=400uA, I
=400uA, I
=400uA, I
=400uA, I
=1mA, V
=100uA.
=V
=V
OUT
OUT
OUTB
OUTB
<0.6A minimum.
Test Conditions
<2.6A peak.
=10V.
=10V.
OUT
IPW
IPW
IPW
IPW
IPW
IPW
IPW
=300uA, I
=300uA, I
=300uA, I
=300uA, I
=300uA, I
=300uA, I
=300uA, I
=V
LIN
OUTB
<VDD
=10V.
IXLD02SI
IOP
IOP
IOP
IOP
IOP
IOP
IOP
=1mA.
=1mA..
=1mA..
=1mA.,
=1mA,
=1mA.,
=1mA,

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