saa5360 NXP Semiconductors, saa5360 Datasheet - Page 22

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saa5360

Manufacturer Part Number
saa5360
Description
Multi Page Intelligent Teletext Decoder
Manufacturer
NXP Semiconductors
Datasheet

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12.3
Ports AD0 to AD7 of the microcontroller can be connected
to pins D0 to D7 of the SRAM in any order.
For the addressing, the lower group of address lines
(A0 to A8) and the upper group of address lines
(A9 to A14, A15_BK, RAMBK0 and RAMBK1) may be
connected in any order within the groups, provided that the
full 256 kbytes of external SRAM is used.
Fig.5 shows the application diagram of the SAA5361 with
external SRAM connections.
When using an external SRAM smaller than 256 kbytes,
the relevant number of bits from the microcontroller
address bus should be disconnected, always removing the
most significant bits first.
For power saving modes, it might be advisable to control
the CE pin of the SRAM module(s) using one of the
microcontroller ports to de-select the SRAM.
12.3.1
Table 4 External data memory access (see Fig.6 and
Note
1. The timings are only valid for the nominal 12 MHz
2005 Mar 09
SYMBOL
t
t
t
t
t
t
t
t
t
t
t
RLRH
WLWH
RLDV
RHDX
RHDZ
LLWL
AVWL
QVWX
WHQX
RLAZ
WHLH
Multi page intelligent teletext decoder
clock provided to the microcontroller.
Application notes
E
Fig.7)
XTERNAL DATA MEMORY ACCESS
RD pulse width
WR pulse width
RD LOW to valid data in 198
Data hold after RD
Data float after RD
ALE LOW to RD or
WR LOW
Address valid to WR
LOW or RD LOW
Data valid to WR LOW
Data hold after WR
RD LOW to address
float
RD or WR HIGH to
ALE HIGH
PARAMETER
TYPICAL
250
250
0
tbd
132
172
89
15
tbd
40
(1)
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
22
12.3.2
Each timing symbol has five characters. The first character
is always ‘t’ (time). Depending on their positions, the other
characters indicate the name of a signal or the logical
status of that signal.
The designations are:
A = Address
C = Clock
D = Input data
H = Logic level HIGH
I = Instruction (program memory contents)
L = Logic level LOW, or ALE
P = PSEN
Q = Output data
R = RD signal
t = Time
V = Valid
W = WR signal
X = No longer a valid logic level
Z = Float
Examples:
t
t
AVLL
LLPL
= time for ALE to PSEN LOW.
= time for address valid to ALE LOW.
S
YMBOL EXPLANATIONS
SAA5360; SAA5361
Product specification

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