saa5233 NXP Semiconductors, saa5233 Datasheet - Page 9
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saa5233
Manufacturer Part Number
saa5233
Description
Dual Standard Decoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAA5233.pdf
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Philips Semiconductors
Note
1. After this time the first clock pulse is generated.
June 1994
I
f
t
t
t
t
t
t
t
t
t
t
2
clk
BUF
HD;STA
LOW
HIGH
SU;STA
HD;DAT
SU;DAT
r
f
SU;STO
SYMBOL
C-bus timing (see Fig.4)
Dual standard PDC decoder
SCL
SDA
SDA
SCL clock frequency
bus free time between a
STOP and START
repeated START hold time
SCL clock LOW time
SCL clock HIGH time
set-up time for a repeated
START
data hold time
data set-up time
SDA, SCL input rise time
SDA, SCL input fall time
set-up time for STOP
MBC764
PARAMETER
t BUF
t HD;STA
note 1
0.3V
0.7V
Fig.4 I
t LOW
DD
DD
CONDITIONS
to 0.3V
to 0.7V
2
C-bus timing diagram.
t SU;STA
DD
DD
t r
9
t HD;DAT
0
4.7
4.0
4.7
4.0
4.7
0
250
4.0
MIN.
t HIGH
t f
TYP.
t SU;DAT
100
1 000
300
t SU;STO
Objective specification
MAX.
SAA5233
kHz
ns
ns
ns
ns
s
s
s
s
s
s
UNIT
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