saa5290ps NXP Semiconductors, saa5290ps Datasheet - Page 11

• Manufacturer Part Number: saa5290ps
• Description: Economy Teletext And Tv Microcontrollers
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7
7.1
The functionality of the microcontroller used in this family
is described here with reference to the industry-standard
80C51 microcontroller. A full description of its functionality
can be found in the “80C51-Based 8-Bit Microcontrollers;
Data Handbook IC20” . Using the 80C51 as a reference,
the changes made to this family fall into two categories:
7.2
7.2.1
The IP SFR is not implemented and all interrupts are
treated with the same priority level. The normal
prioritisation of interrupts is maintained within the level.
Table 2 Interrupts and vectors address
Note
1. SAA5290, SAA5290A, SAA5291, SAA5291A and
7.2.2
The SDIP52 version does not support the use of off-chip
program memory or off-chip data memory.
7.2.3
As Idle and Power-down modes are not supported, their
respective bits in PCON are not available.
7.2.4
The 80C51 UART is not available. As a consequence the
SCON and SBUF SFRs are removed and the ES bit in the
IE SFR is unavailable.
1998 Dec 14
Reset
External INT0
Timer 0
External INT1
Timer 1
Byte I
Bit I
INTERRUPT SOURCE
Features not supported by the SAA529x, SAA529xA or
SAA549x devices
Features found on the SAA529x, SAA529xA or
SAA549x devices but not supported by the 80C51.
Economy teletext and TV microcontrollers
SAA5491 only.
FUNCTIONAL DESCRIPTION
2
C-bus; note 1
2
Microcontroller
80C51 features not supported
C-bus
I
O
I
UART F
NTERRUPT PRIORITY
DLE AND
FF
-
CHIP MEMORY
UNCTION
P
OWER
-
DOWN MODES
VECTOR ADDRESS
00BH
01BH
02BH
000H
003H
013H
053H
11
7.3
The following features are provided in addition to the
standard 80C51 features.
7.3.1
The external INT1 interrupt is modified to generate an
interrupt on both the rising and falling edges of the INT1
pin, when EX1 bit is set. This facility allows for software
pulse width measurement for handling of a remote control.
7.3.2
For reasons of compatibility with SAA5290 and
SAA5290A, the SAA5291, SAA5291A and SAA5491
contain a bit level serial I/O which supports the I
P1.6/SCL and P1.7/SDA are the serial I/O pins. These two
pins meet the I
to use it (including specifications)” concerning the input
levels and output drive capability. Consequently, these two
pins have an open-drain output configuration. All the four
following modes of the I
Three SFRs support the function of the bit-level I
hardware: S1INT, S1BIT and S1SCS and are enabled by
setting register bit TXT8.I
7.3.3
The byte level serial I/O supports the I
P1.6/SCL and P1.7/SDA are the serial I/O pins. These two
pins meet the I
levels and output drive capability. Consequently, these two
pins have an open-drain output configuration.
The byte level I
serial port on the 8xC552. The operation of the subsystem
is described in detail in the 8xC552 data sheet found in
“80C51-Based 8-Bit Microcontrollers; Data Handbook
IC20” .
Four SFRs support the function of the byte level I
hardware, they are S1CON, S1STA, S1DAT and S1ADR
and are enabled by setting register bit TXT8.I
to logic 1.
7.3.4
Port pins P0.5 and P0.6 have a 10 mA current sinking
capability to enable LEDs to be driven directly.
Master transmitter
Master receiver
Slave transmitter
Slave receiver.
Additional features
B
LED
I
B
NTERRUPTS
IT LEVEL
YTE LEVEL
SUPPORT
2
2
2
C-bus specification “The I
C-bus specification concerning the input
C-bus serial port is identical to the I
I
2
C-
I
2
C-
BUS INTERFACE
2
C-bus are supported.
BUS INTERFACE
2
C SELECT to logic 0.
SAA5x9x family
Preliminary specification
2
C-bus protocol.
2
C-bus and how
2
C SELECT
2
2
C-bus.
2
C-bus
C-bus
2
C-bus