mt9v131i29stc aptina, mt9v131i29stc Datasheet - Page 9

• Manufacturer Part Number: mt9v131i29stc
• Description: Mt9v131 1/4-inch Soc Vga Cmos Digital Image Sensor
• Manufacturer: aptina

Sensor Core Overview
Figure 7:
Figure 8:
PDF: 09005aef824c99b3/Source: 009005aef824c99bb
MT9V131_LDS_2.fm - Rev. B 3/07 EN
Sensor Core Block Diagram
Spatial Illustration of Image Readout
The sensor consists of a pixel array of 668 x 496 total, analog readout chain, 10-bit ADC
with programmable gain and black offset, and timing and control.
The sensor core image data is read-out in a progressive scan. Valid image data is
surrounded by horizontal and vertical blanking, as shown in Figure 8.
P
m-1,0
P
P
P
0,0
1,0
00 00 00 ..................................... 00 00 00
00 00 00 ..................................... 00 00 00
00 00 00 ..................................... 00 00 00
00 00 00 ..................................... 00 00 00
m,0
P
P
P
0,1
1,1
m-1,1
P
Sensor Array
Active Pixel
m,1
P
P
0,2
1,2
.....................................P
.....................................P
VERTICAL BLANKING
.....................................P
.....................................P
VALID IMAGE
MT9V131: 1/4-Inch SOC VGA CMOS Digital Image Sensor
m-1,n-1
m,n-1
0,n-1
1,n-1
P
m,n
P
P
P
0,n
1,n
m-1,n
9
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
00 00 00 .................. 00 00 00
Timing and Control
Control Register
VERTICAL/HORIZONTAL
HORIZONTAL
ADC
BLANKING
BLANKING
Micron Technology, Inc., reserves the right to change products or specifications without notice.
10-bit Data
Communication
Bus to IFP
Clock
Sync. Signals
to IFP
Sensor Core Overview
©2006 Micron Technology, Inc. All rights reserved.
Preliminary