mt9v131i29stc aptina, mt9v131i29stc Datasheet
mt9v131i29stc
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mt9v131i29stc Summary of contents
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... SOC VGA CMOS Digital Image Sensor MT9V131I29STC (iCSP) MT9V131C12STC (CLCC) Features ® ® • Micron DigitalClarity CMOS imaging technology • System-On-a-Chip (SOC)—Completely integrated camera system • Ultra low-power, high fidelity CMOS image sensor • Superior low-light performance • fps progressive scan at 27 MHz for high- quality video at VGA resolution • ...
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General Description This SOC VGA CMOS image sensor features DigitalClarity low-noise CMOS imaging technology that achieves CCD image quality (based on signal- to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost, and integration advantages of CMOS. The MT9V131 ...
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Figure 1 illustrates the MT9V131 quantum efficiency in relation to wavelength. Figure 1: MT9V131 Quantum Efficiency vs. Wavelength Figure 2: Chip Block Diagram SCLK S DATA S ADDR CLK STANDBY OE# ...
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Figure 3 shows MT9V131 typical connections. For low-noise operation, the MT9V131 requires separate supplies for analog and digital power. Incoming digital and analog ground conductors can be tied together right next to the die. Both power supply rails should be ...
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Ball Assignment Figure 4: 44-Ball iCSP Pinout Diagram Figure 5: 48-Pin CLCC Pinout Diagram D OUT D OUT_ FLASH PIXCLK LINE_VALID FRAME_VALID PDF: 09005aef824c99b3/Source: 009005aef824c99bb MT9V131_LDS_2.fm - Rev. B 3/07 EN MT9V131: 1/4-Inch ...
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Table 4: Ball and Pin Description Symbol CLCC Pin CLKIN 20 SCLK ADDR ADC_TEST 31 RESET# 33 STANDBY 34 OE# 35 SCAN_EN DATA FLASH 13 PIXCLK 14 LINE_VALID 15 FRAME_VALID ...
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Image Flow Processor Overview of Architecture The image flow processor consists of a color processing pipeline and a measurement and control logic block, as shown in Figure 6 on page 8. The stream of raw data from the sensor enters ...
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Figure 6: Image Flow Processor Block Diagram The MT9V131 features smooth, continuous zoom and pan. This functionality is avail- able when the IFP output is downsized in the decimation block. The decimation block can downsize the original VGA image to ...
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Sensor Core Overview The sensor consists of a pixel array of 668 x 496 total, analog readout chain, 10-bit ADC with programmable gain and black offset, and timing and control. Figure 7: Sensor Core Block Diagram Sensor Array The sensor ...
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Electrical Specifications The recommended die operating temperature ranges from –20°C to +40°C. The sensor image quality may degrade above +40°C. Table 5: DC Electrical Characteristics 2.8 ± 0.25V Symbol Definition V Input high ...
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Table 6: AC Electrical Characteristics 2.8 ± 0.25V Definition Input clock frequency Clock duty cycle Input clock rise time Input clock fall time CLKIN to PIXCLK propagation LOW-to-HIGH delay HIGH-to-LOW PIXCLK to D ...
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Figure 9: 44-Ball iCSP Package Outline SEATING PLANE A 0.10 A 4.50 0.75 TYP BALL A7 44X Ø0.35 DIMENSIONS APPLY TO SOLDER BALLS POST REFLOW. THE PRE- REFLOW DIAMETER IS Ø0.33 4.50 0.75 TYP C L 2.25 7.00 ±0.075 SOLDER ...
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Figure 10: 48-Pin CLCC Package Outline D Seating plane A 8.8 0.8 47X 4.4 TYP 1.0 ±0 48X 0.40 ±0.05 8.8 4.4 4X 0.2 5.215 5.715 11.43 Lead finish: Au plating, 0.50 microns minimum thickness over Ni plating, ...
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Revision History Rev ...