m471b5273bh1 Samsung Semiconductor, Inc., m471b5273bh1 Datasheet - Page 15

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m471b5273bh1

Manufacturer Part Number
m471b5273bh1
Description
Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
11.0 AC and DC Output Measurement Levels
11.1 Single Ended AC and DC Output Levels
Single Ended AC and DC output levels
Note : 1. The swing of +/-0.1 x V
11.2 Differential AC and DC Output Levels
Differential AC and DC output levels
Note : 1. The swing of +/-0.2xV
11.3 Single Ended Output Slew Rate
With the reference load for timing measurements, output slew rate for falling and rising edges is defined and measured between V
for single ended signals as shown in below.
Single Ended Output slew rate definition
Note : Output slew rate is verified by design and characterization, and may not be subject to production test.
Single Ended Output slew rate
Description : SR : Slew Rate
Q : Query Output (like in DQ, which stands for Data-in, Query-Output
se : Singe-ended Signals
For Ron = RZQ/7 setting
Unbuffered SoDIMM
Single ended output slew rate for rising edge
Single ended output slew rate for falling edge
Single ended output slew rate
V
V
V
V
V
Symbol
OH
OM
OL
OH
OL
V
V
Symbol
OHdiff
OLdiff
(DC)
(DC)
(AC)
(DC)
(AC)
and an effective test load of 25
and an effective test load of 25
(DC)
(AC)
Parameter
Parameter
DC output high measurement level (for IV curve linearity)
DC output mid measurement level (for IV curve linearity)
DC output low measurement level (for IV curve linearity)
AC output high measurement level (for output SR)
AC output low measurement level (for output SR)
Parameter
AC differential output high measurement level (for output SR)
AC differential output low measurement level (for output SR)
Description
DDQ
DDQ
is based on approximately 50% of the static singel ended output high or low swing with a driver impedance of 40
is based on approximately 50% of the static single ended output high or low swing with a driver impedance of 40
Symbol
SRQse
to V
to V
TT
TT
Figure 7. Single Ended Output Slew Rate definition
=V
=V
DDQ
DDQ
delta
/2.
/2 at each of the differential outputs.
Min
2.5
TFse
V
V
From
OL
OH
15 of 28
(AC)
(AC)
DDR3-1066
Measured
Max
V
V
5
OH
OL
To
(AC)
(AC)
delta
TRse
Min
2.5
V
V
V
OH(AC)
DDR3-1333
TT
OL(AC)
DDR3-1066/1333
V
DDR3-1066/1333
V
TT
TT
+0.2 x V
-0.2 x V
0.8 x V
0.5 x V
0.2 x V
+ 0.1 x V
- 0.1 x V
Rev. 1.0 December 2008
DDQ
DDQ
DDQ
DDQ
V
V
DDQ
OH
OH
Max
DDQ
DDQ
Defined by
Delta TRse
Delta TFse
5
(AC)-V
(AC)-V
DDR3 SDRAM
OL
OL
(AC)
(AC)
OL
Units
Units
(AC) and V
V
V
V
V
V
V
V
Units
V/ns
Notes
Notes
OH
1
1
1
1
(AC)

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