mt18ksf25672pdy-1g1 Micron Semiconductor Products, mt18ksf25672pdy-1g1 Datasheet
mt18ksf25672pdy-1g1
Related parts for mt18ksf25672pdy-1g1
mt18ksf25672pdy-1g1 Summary of contents
Page 1
... V = 1.35V 0.0675V ± DD • Backward-compatible with standard 1.5V DDR3 systems • 240-pin, registered dual in-line memory module (RDIMM) • Fast data transfer rates: PC3-8500 or PC3-6400 • 2GB (256 Meg x 72) • +3.0V to +3.6V DDSPD • Supports ECC error detection and correction • ...
Page 2
... The data sheet for the base device can be found on Micron’s Web site. 2. All part numbers end with a two-place code (not shown) that designates component and PCB revisions. Consult factory for current revision codes. Example: MT18KSF25672PDY-1G1D1. PDF: 09005aef833b06c2/Source: 09005aef833b0609 KSF18C256x72PD.fm - Rev. A 4/08 EN 2GB (x72, ECC, DR,1 ...
Page 3
Pin Assignments and Descriptions Table 4: Pin Assignments 240-Pin DDR3 RDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol DQ25 61 REF ...
Page 4
... DQS#[8:0] aligned with read data. Input with write data. Center-aligned with write data. SDA I/O Serial data: SDA is a bidirectional pin used to transfer addresses and data into and out of the temperature sensor/SPD EEPROM on the module on the Output Parity error output: Parity error found on the command and address bus. ...
Page 5
... Termination voltage: Used for control, command, and address ( – No connect: These pins are not connected on the module. NU – Not used: These pins are not used in specific module configuration/operations. PDF: 09005aef833b06c2/Source: 09005aef833b0609 KSF18C256x72PD.fm - Rev. A 4/08 EN 2GB (x72, ECC, DR,1.35V) 240-Pin DDR3 SDRAM RDIMM Pin Assignments and Descriptions . DD /2) ...
Page 6
Functional Block Diagram Figure 2: Functional Block Diagram RS1# RS0# DQS0 DQS0# DM0/DQS9 NU/TDQS9# DM/ NU/ CS# DQS DQS# TRDQS TRDQS# DQ DQ0 DQ DQ1 DQ2 DQ DQ DQ3 DQ DQ4 DQ DQ5 DQ6 DQ DQ DQ7 ...
Page 7
... The double data rate architecture is essentially an 8n-prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM module effectively consists of a single 8n-bit-wide, one-clock-cycle data transfer at the internal DRAM core and eight corre- sponding n-bit-wide, one-half-clock-cycle data transfers at the I/O pins ...
Page 8
... Platform Memory Module Thermal Sensor Component Specification.” Serial Presence-Detect EEPROM Operation 1.35V DDR3 SDRAM modules incorporate serial presence-detect. The SPD data is stored in a 256-byte EEPROM. The first 128 bytes are programmed by Micron to comply with JEDEC Standard JC-45 “Appendix X: Serial Presence Detect (SPD) for DDR3 SDRAM Modules.” ...
Page 9
... TYP 1.0 (0.039) R (8X) Back view U14 U15 U17 U18 U19 5.0 (0.197) TYP 71.0 (2.79) 47.0 (1.85) TYP TYP Micron Technology, Inc., reserves the right to change products or specifications without notice. 9 Module Dimensions 4.0 (0.157) MAX U10 U11 30.50 (1.20) 23.3 (0.92) 29.85 (1.175) TYP 17.3 (0.68) TYP 1.37 (0.054) 1.17 (0.046) 9.5 (0.374) TYP Pin 120 3 ...