mt18lsdt3272dy-133 Micron Semiconductor Products, mt18lsdt3272dy-133 Datasheet - Page 11

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mt18lsdt3272dy-133

Manufacturer Part Number
mt18lsdt3272dy-133
Description
256mb, 512mb, 1gb X72, Ecc, Dr 168-pin Sdram Rdimm
Manufacturer
Micron Semiconductor Products
Datasheet
Register and PLL Specifications
Table 12:
Table 13:
PDF: 09005aef809b1694/Source: 09005aef809b166a
SD18C32_64_128x72D.fm - Rev. G 12/07 EN
Parameter
Parameter
Max clock pulse frequency
Propagation delay, single rank
(CK to output)
Propagation delay, dual rank
(CK to output)
Pulse duration
Setup time
Hold time
Operating clock frequency
Input duty cycle
Cycle-to-cycle jitter
Static phase offset
SSC induced skew
Output-to-output skew
Register Timing Requirements and Switching Characteristics
162835A device or equivalent JESD82-2
PLL Clock Driver Timing Requirements and Switching Characteristics
CDC2510 device or equivalent JESD82-5
Notes:
1. SSC = spread spectrum clock. The use of SSC synthesizers on the system motherboard will
2. Skew is defined as the total clock skew between any two outputs and, therefore, is speci-
reduce EMI.
fied as a maximum only.
Symbol
f
t
t
MAX
PD1
PD2
t
t
t
SU
W
H
256MB, 512MB, 1GB (x72, ECC, DR) 168-Pin SDRAM RDIMM
Symbol
t
t
t
t
JIT
f
SSC
SK
t
DC
CK
CC
O
50pF to GND and 50Ω to V
30pF to GND and 50Ω to V
Data before CK HIGH
Data after CK HIGH
CK, HIGH or LOW
Condition
–150
Min
–75
11
50
44
Micron Technology, Inc., reserves the right to change products or specifications without notice.
TT
TT
Max
140
150
150
150
55
75
Register and PLL Specifications
Min
150
1.4
0.7
3.3
1.0
0.6
Units
MHz
©2001 Micron Technology, Inc. All rights reserved
%
ps
ps
ps
ps
Max
240
3.5
2.5
Notes
Units
1, 2
MHz
ns
ns
ns
ns
ns

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