mt18htf25672pdy-80e Micron Semiconductor Products, mt18htf25672pdy-80e Datasheet
mt18htf25672pdy-80e
Related parts for mt18htf25672pdy-80e
mt18htf25672pdy-80e Summary of contents
Page 1
... MT18HTF12872(P)D – 1GB MT18HTF25672(P)D – 2GB For component data sheets, refer to Micron’s Web site: Features • 240-pin, registered dual in-line memory module • Fast data transfer rates: PC2-3200, PC2-4200, PC2-5300, or PC2-6400 • 512MB (64 Meg x 72), 1GB (128 Meg x 72), 2GB (256 Meg x 72) • ...
Page 2
... Module 2 Part Number Density MT18HTF12872(P)DY-80E__ MT18HTF12872(P)DY-800__ MT18HTF12872(P)DY-667__ MT18HTF12872(P)DY-53E__ MT18HTF12872(P)DY-40E__ Table 5: Part Numbers and Timing Parameters – 2GB Modules Notes appear below; base device: MT47H128M8 Module 2 Part Number Density MT18HTF25672(P)DY-80E__ MT18HTF25672(P)DY-800__ MT18HTF25672(P)DY-667__ MT18HTF25672(P)DY-53E__ ...
Page 3
Pin Assignments and Descriptions Table 6: Pin Assignments 240-Pin RDIMM Front Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin DQ19 61 REF ...
Page 4
... I/O (SSTL_18) Data input/output: Bidirectional data bus. CB0–CB7 I/O (SSTL_18) Check bits. SDA I/O Serial presence-detect data: SDA is a bidirectional pin used to transfer addresses and data into and out of the presence-detect portion of the module Output Parity error found on the address and control bus. RR ...
Page 5
Functional Block Diagram Figure 2: Functional Block Diagram RS1# RS0# DQS0 DQS0# DM0/DQS9 NC/DQS9# DM/ NU/ CS# DQS DQS# RDQS RDQS# DQ DQ0 DQ DQ1 DQ DQ2 DQ DQ3 DQ DQ4 DQ DQ5 DQ DQ6 DQ DQ7 DQS1 DQS1# DM1/DQS10 ...
Page 6
... DDR2 SDRAM modules incorporate serial presence-detect (SPD). The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be programmed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...
Page 7
... Electrical Specifications Stresses greater than those listed in Table 8 may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other conditions above those indicated in each device’s data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability ...
Page 8
... HIGH HIGH between valid commands; Address bus inputs are stable during deselects; Data bus inputs are switching Notes: 1. Value calculated as one module rank in this operating condition, all other module ranks Value calculated reflects all module ranks in this operating condition. ...
Page 9
... HIGH HIGH between valid commands; Address bus inputs are stable during deselects; Data bus inputs are switching Notes: 1. Value calculated as one module rank in this operating condition, all other module ranks Value calculated reflects all module ranks in this operating condition. ...
Page 10
... S# is HIGH between valid commands; Address bus inputs are stable during deselects; Data bus inputs are switching Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. ...
Page 11
... HIGH HIGH between valid commands; Address bus inputs are stable during deselects; Data bus inputs are switching Notes: 1. Value calculated as one module rank in this operating condition; all other module ranks Value calculated reflects all module ranks in this operating condition. ...
Page 12
... Timing and switching specifications for the register listed above are critical for proper operation of the DDR2 SDRAM registered DIMMs. These are meant subset of the parameters for the specific device used on the module. Detailed information for this regis- ter is available in JEDEC standard JESD82. ...
Page 13
Table 15: PLL Specifications CU877 device or equivalent JESD82-8.01 Parameter Symbol DC high-level input voltage V DC low-level input voltage V V Input voltage (limits high-level input voltage DC low-level input voltage V Input differential-pair cross V voltage ...
Page 14
Serial Presence-Detect Table 17: Serial Presence-Detect EEPROM DC Operating Conditions All voltages referenced to V Parameter/Condition Supply voltage Input high voltage: Logic 1; All inputs Input low voltage: Logic 0; All inputs Output low voltage 3mA OUT Input ...
Page 15
... Number of SPD bytes used by Micron 1 Total number of bytes in SPD device 2 Fundamental memory type 3 Number of row addresses on SDRAM 4 Number of column addresses on SDRAM 5 DIMM height and module ranks 6 Module data width 7 Reserved 8 Module voltage interface levels t 9 SDRAM cycle time, CK (CL = MAX value, see byte 18) ...
Page 16
... Description 27 MIN row precharge time, 28 MIN row active-to-row active, 29 MIN RAS#-to-CAS# delay, 30 MIN active-to-precharge time, 31 Module rank density 32 Address and command setup time, 33 Address and command hold time, 34 Data/data mask input setup time, 35 Data/data mask input hold time, t ...
Page 17
... Module serial number 99–127 Reserved for manufacturer-specific data 128–255 Reserved for customer-specific data Notes: 1. The 512MB module is not available in -80E or -800 speed grades. 2. The DDR2 device specification is PDF: 09005aef80e935cd/Source: 09005aef80e934a6 HTF18C64_128_256x72D.fm - Rev. E 2/07 EN 512MB, 1GB, 2GB (x72, ECC, DR) 240-Pin DDR2 SDRAM RDIMM Entry (Version) Release 1 ...
Page 18
... TYP BACK VIEW U17 U16 U18 U19 U20 5.0 (0.197) TYP 55.0 (2.165) TYP ® their respective owners. 18 Module Dimensions U11 U12 30.50 (1.20) 29.85 (1.175) 17.78 (0.700) TYP 10.00 (0.394) TYP PIN 120 U21 U22 PIN 121 Micron Technology, Inc., reserves the right to change products or specifications without notice. ...