lri64 STMicroelectronics, lri64 Datasheet - Page 30

• Manufacturer Part Number: lri64
• Description: Memory Tag Ic At 13.56 Mhz, With 64-bit Unique Id And Worm User Area, Iso15693 And Iso18000-3 Mode 1 Compliant
• Manufacturer: STMicroelectronics

Timing definitions
17
17.1
17.2
30/52
Timing definitions
Figure 21
specified in
Table
Table 8.
1. The tolerance of specific timings is ± 32/f
2.
3.
LRI64 response delay, t
Upon detection of the rising edge of the EOF received from the VCD, the LRI64 waits for a
time equal to
before starting to transmit its response to a VCD request, or switching to the next slot when
in an inventory process.
VCD new request delay, t
t
more LRI64 responses have been received during an inventory command. It starts from the
reception of the EOF received from the LRI64 devices.
The EOF sent by the VCD is 10% modulated, independent of the modulation index used for
transmitting the VCD request to the LRI64.
t
Figure
2
2
is also the time after which the VCD may send a new request to the LRI64 as described in
is the time after which the VCD may send an EOF to switch to the next slot when one or
t
t
t
t
t
command description.
1
2
3
SOF
1
(max)
14, as summarized in
is the duration for the LRI64 to transmit an SOF to the VCD.
18.
does not apply for write alike requests. Timing conditions for write alike requests are defined in the
t
t
shows three specific delay times: t
1
2
(typ) = 4352 / f
(min) = 4192 / f
Table
Timing values
t
(see notes
2
(min) = 4192 / f
t
1
14. The t
(max) + t
t
1
Min.
(min)
C
(2),(3)
C
1
SOF
(1)
Table
parameter also has a maximum and a typical value specified in
C
)
8.
1
C
.
2
1
, t
2
t
1
and t
(typ) = 4352 / f
3
Typ.
. All of them have a minimum value,
—
—
C
t
1
Max.
(max)
—
—
LRI64