hb28j128mm3 Renesas Electronics Corporation., hb28j128mm3 Datasheet - Page 44

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hb28j128mm3

Manufacturer Part Number
hb28j128mm3
Description
Multimediacard 32 Mbyte/64 Mbyte/128 Mbyte/256 Mbyte/512 Mbyte
Manufacturer
Renesas Electronics Corporation.
Datasheet
HB28K032/L064/J128/J256/J512MM3, HB28K032/L064/J128/J256RM3
Responses
All responses are sent via command line (CMD), all data starts with the MSB.
Format R1 (response command): response length 48 bits.
The contents of the status field are described in Chapter “Status”
Format R1b (response command with busy signal):
R1b is identical to R1 with an optional busy signal transmitted on the data line. The card may become
busy after receiving these commands based on its state prior to the command reception.
Format R2 (CID, CSD register): response length 136 bits.
Note: Bit 127 down to bit 1 of CID and CSD are transferred, the reserved bit [0] is replaced by the end bit.
CID register is sent as a response to commands CMD2 and CMD10.
CSD register is sent as a response to the CMD9.
Format R3 (OCR): response length 48 bits.
The OCR is sent as a response to the CMD1 to signalize the supported voltage range. These Renesas
MultiMediaCards support the range from 2.7 V to 3.6 V. Respectively the value of all bits of the OCR
field of these Renesas MultiMediaCards is set to 0x80FF8000. So the R3 frame contains the value
0x3F80FF8000FF if the card is ready and 0x3F00FF8000FF if the card is busy.
Rev.0.02, Sep.15.2004, page 44 of 89
0
start bit
0
start bit
0
start bit
0
card
0
card
0
card
bit5...bit0
command
bit5...bit0
reserved
bit5...bit0
reserved
bit127...bit1
CID or CSD register
including internal CRC
bit31...bit0
status
bit31...bit0
OCR field
bit6...bit0
CRC
bit6...bit0
reserved
1
end bit
1
end bit
1
end bit

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