k4t1g084qc Samsung Semiconductor, Inc., k4t1g084qc Datasheet - Page 19

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k4t1g084qc

Manufacturer Part Number
k4t1g084qc
Description
1gb C-die Ddr2 Sdram Specification
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K4T1G044QC
K4T1G084QC
Parameter
Exit active power down to read command
Exit active power down to read command
(slow exit, lower power)
CKE minimum pulse width
(high and low pulse width)
ODT turn-on delay
ODT turn-on
ODT turn-on(Power-Down mode)
ODT turn-off delay
ODT turn-off
ODT turn-off (Power-Down mode)
ODT to power down entry latency
ODT power down exit latency
OCD drive mode output delay
Minimum time clocks remains ON after CKE asyn-
chronously drops LOW
Symbol
tXARD
tXARDS
t
t
t
t
t
t
t
tANPD
tAXPD
tOIT
tDelay
CKE
AOND
AON
AONPD
AOFD
AOF
AOFPD
tAC(min)
tAC(min)
tAC(min)
tAC(min)
tIS+tCK
8 - AL
min
+tIH
2.5
+2
+2
3
2
3
8
0
DDR2-800
2
tAC(max)
tAC(max)
tAC(max)
2.5tCK+t
AC(max)
2tCK +
max
+ 0.6
+0.7
2.5
+1
+1
12
2
x
19 of 26
tAC(min)
tAC(min)
tAC(min)
tAC(min)
tIS+tCK
7 - AL
min
+tIH
2.5
+2
+2
3
2
3
8
0
DDR2-667
2
2tCK+tAC
tAC(max)
tAC(max)
2.5tCK+t
AC(max)
(max)+1
max
+ 0.6
+0.7
2.5
+1
12
2
x
tAC(min)
tAC(min)
tAC(min)
tIS+tCK
tAC(min)
6 - AL
min
+tIH
2.5
+2
+2
3
2
3
8
0
DDR2-533
2
2tCK+tAC
tAC(max)
tAC(max)+
tAC(max)
(max)+1
2.5tCK+
max
2.5
+1
0.6
+1
12
2
x
tAC(min)
tAC(min)
tAC(min)
tAC(min)
tIS+tCK
6 - AL
min
+tIH
2.5
+2
+2
3
2
3
8
0
DDR2-400
2
DDR2 SDRAM
Rev. 1.1 June 2007
2tCK+tAC
tAC(max)
tAC(max)+
tAC(max)
(max)+1
2.5tCK+
max
2.5
+1
0.6
+1
12
2
x
Units Notes
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
13, 25
9, 10
36
26
24
9

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