s71ns032ja0 Meet Spansion Inc., s71ns032ja0 Datasheet - Page 6

• Manufacturer Part Number: s71ns032ja0
• Description: Burst Mode Multiplexed Flash Memory With Psram 110 Nm Cmos 1.8 Volt-only Simultaneous Read/write, Burst Mode Multiplexed Flash Memory With Psram
• Manufacturer: Meet Spansion Inc.

3.
4
Input/Output Descriptions
R-UB#
R-LB#
A21–A16
ADQ15–ADQ0
R-CE#
F-CE#
OE#
WE#
V
V
NC
RDY
CLK
AVD#
F-RST#
F-ACC
R-CRE
V
V
CC
SS
CCQ
SSQ
Signal
pSRAM Upper Byte Control
pSRAM Lower Byte Control
Address Inputs
Multiplexed Address/Data input/output
pSRAM Chip Select Input
Flash Chip Enable Input. Asynchronous relative to CLK for the Burst mode.
Output Enable Input. Asynchronous relative to CLK for the Burst mode.
Write Enable Input.
Device Power Supply (1.7 V–1.95 V).
Ground
No Connect; not connected internally
Ready output; indicates the status of the Burst read. VOL= data invalid. WAIT# pin of pSRAM is
shared with Flash RDY pin for synchronous pSRAM.
Clock input. The first rising edge of CLK in conjunction with AVD# low latches address input and
activates burst mode operation. After the initial word is output, subsequent rising edges of CLK
increment the internal address counter. CLK should remain low during asynchronous access.
CLK is present on MuxpSRAM Type 3, but not on MuxpSRAM Type 2. As a result, it is a shared
signal on S71NS064JA0, but a flash-only signal on S71NS032J.
Address Valid input. Indicates to device that the valid address is present on the address inputs
(address bits A15–A0 are multiplexed, address bits A22–A16 are address only).
V
be latched on rising edge of CLK.
V
Hardware reset input. V
At 12 V, accelerates programming; automatically places device in unlock bypass mode. At V
disables program and erase functions. Should be at V
Command Register Enable of pSRAM
I/O Power Supply (1.7 V to 1.95 V)
I/O Ground
IL
IH
= device ignores address inputs
= for asynchronous mode, indicates valid address; for burst mode, causes starting address to
D a t a
S h e e t
IL
= device resets and returns to reading array data
S71NS-J
( A d v a n c e
Description
IH
for all other conditions.
I n f o r m a t i o n )
S71NS-J_00_03 October 10, 2006
IL
,
Flash
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
RAM
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X