oq2541u NXP Semiconductors, oq2541u Datasheet - Page 11

• Manufacturer Part Number: oq2541u
• Description: Sdh/sonet Data And Clock Recovery Unit Stm1/4/16 Oc3/12/48 Ge
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Application with positive supply voltage
Due to the versatile design of the OQ2541 the device can
also operate in a positive supply voltage application,
although some pins have a different mode of operation.
This section deals with these differences and supports the
user with achieving a successful application of the
OQ2541 in a +5 V environment.
A
A sample application diagram can be found in Fig.29.
It should be noted that all pins GND are now connected to
V
voltage from the power controller.
O
In a positive supply voltage application, the loop mode is
the default RF output. Due to the decoding logic on
pin ENL, it is only possible to select the loop mode outputs
or enable all the outputs.
If pin ENL is connected to V
outputs are active (see Table 4). When pin ENL is
connected to V
below V
supply voltage application the normal mode outputs can
not be selected, unless the voltage on pin ENL is 2 V
above the positive supply voltage (V
Table 4 Output selection in a positive supply voltage application
Table 5 LOS and LOCK indication in a positive supply voltage application
1999 May 27
Do not to connect pin ENL to ground, because this will
destroy the IC.
Loop
Loop and normal
Normal
LOS active
LOS inactive
LOCK active
LOCK inactive
PPLICATION DIAGRAM
CC
UTPUT SELECTION
SDH/SONET data and clock recovery unit
STM1/4/16 OC3/12/48 GE
and all pins V
SIGNAL
MODE
CC
) all outputs become active. In the positive
EE
(the voltage is approximately 3.3 V
EE
loss of signal: BER > 5 10
no loss of signal: BER < 1 10
reference clock present and VCRO inside 1000 ppm window
no reference clock present or VCRO outside 1000 ppm window
are connected to the regulated
CAUTION
LEVEL ON PIN ENL
V
CC
EE
V
V
(+5 V), only the loop mode
(V
CC
CC
CC
(+5 V)
+ 2 V
CC
3.3 V)
).
DESCRIPTION
2
3
CLOOP AND CLOOPQ
11
DLOOP, DLOOPQ,
L
In the negative supply application, pins LOS and LOCK
are open-collector outputs that require pull-up resistors to
a positive supply voltage.
In the positive supply application, the pull-up voltage would
need to be higher then the positive supply voltage and the
signals on pins LOS and LOCK would not be TTL
compatible any more. However, the internal circuit on
pins LOS and LOCK can be used in a current mirror
configuration (see Fig.9). This requires only an external
PNP transistor (e.g. BC857 or equivalent) to mirror the
current. A 10 k pull-down resistor from the collector of the
external transistor to ground yields a TTL compatible
signal again, albeit inverted. Table 5 shows the meaning of
the LOS and LOCK flag, when used in the positive supply
application.
handbook, halfpage
OSS OF SIGNAL AND LOCK DETECTION
Fig.9
active
active
Signal out for LOS and LOCK indication in a
positive supply voltage application.
MGL671
on chip
OUTPUT
OQ2541HP; OQ2541U
GND
0 V (ground)
0 V (ground)
LOS,
LOCK
+5 V (V
+5 V (V
LEVEL
off chip
COUT AND COUTQ
DOUT, DOUTQ,
CC
CC
BC857
10 k
Product specification
)
)
active
active
signal out
5 V
HIGH
HIGH
LOW
LOW
TTL