uaa3580 NXP Semiconductors, uaa3580 Datasheet - Page 8

• Manufacturer Part Number: uaa3580
• Description: Wideband Code Division Multiple Access Frequency Division Duplex Zero If Receiver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9
9.1
The circuit can be powered up into different operating
modes, depending on the control bits RXON and SYNON,
via the 3-wire bus. This defines three main modes called
IDLE, SYN and RX mode.
The voltage level applied to pin RXCEN must be set HIGH
to enable the device. The VCO and the PLL sections are
enabled in SYN mode. In the RX mode every section is
enabled (receive part, VCO and PLL sections).
Table 3 AGC gain look-up table
2002 Oct 30
AGC8
Wideband code division multiple access
frequency division duplex zero IF receiver
OPERATING MODES
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
Basic operating modes
AGC7
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
AGC6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AGC5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AGC4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AGC3
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
8
Table 2 Selection of operating mode
9.2
The AGC gain is set via the AGC[8:0] bits; see Table 3.
IDLE
SYN
RX
AGC2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
MODE
AGC gain look-up table
AGC1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
1
AGC0
SYNON
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
ATTENUATION FROM
MAXIMUM GAIN (dB)
Objective specification
0
0
1
UAA3580
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
0
1
2
3
4
5
6
7
8
9
RXON