uaa3515a NXP Semiconductors, uaa3515a Datasheet - Page 19

• Manufacturer Part Number: uaa3515a
• Description: 900 Mhz Analog Cordless Telephone Ic
• Manufacturer: NXP Semiconductors

white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ...
7.9.1
Table 5 shows the data latches and addresses that select each of the registers; bit D15 is the MSB, this is written and loaded first.
Table 5 Data register addresses: note 1
Notes
1. With a 10 k pull-up resistor connected to pin EN or the microcontroller, guarantees that V
2. Undefined zone; should always be programmed with 0.
3. In the inactive mode programming V
Table 6 Data register default values at power-on (undefined zones shown programmed with 0)
ADDR
ADDR
000
001
010
011
100
101
110
000
001
010
011
100
101
110
and not to change it.
D
enable
ATA REGISTERS
note 2
D15
V
SBS
D15
0
0
0
0
0
0
0
REG
PA output [2 to 0]
(3)
D14
VCTL[1 and 0] ear
CLKO
0
0
0
0
0
0
1
level
active modes
D14
[1 and 0]
RX prescaler [5 to 0]
TX prescaler [5 to 0]
D13
note 2 doubler
0
0
0
1
0
1
0
D13
note 2
D12
piece
enable
enable
charge
current
pump
0
0
0
0
0
1
0
D12
high
Xtal
TX
REG
enable from 1 to 0 might reset all of the registers. We therefore recommend that this register be set to 1
D11
current
charge
0
0
0
0
0
0
0
pump
D11
RX
D10
RX gain control [4 to 0]
TX gain control [4 to 0]
1
1
0
0
1
0
0
D10
CD levels [4 to 0]
voltage reference
adjust [2 to 0]
D9
1
0
0
0
1
0
1
D9
D8
1
0
1
0
1
0
1
D8
D7
1
1
0
1
1
0
0
D7
test mode [2 to 0]
mute
D6
SFS
1
1
0
1
1
0
0
D6
TX
LBD levels [2 to 0]
reference divider [9 to 0]
IH
RX main divider [9 to 0]
TX main divider [9 to 0]
> 0.9V
enable
phase
limiter
DATA
D5
hard
0
0
0
1
0
0
0
D5
CC
for the EN signal
disable
note 2
D4
ALC
D4
0
1
0
0
0
0
0
FM PLL VCO tuning [4 to 0]
active
active
LBD
D3
Xtal
D3
1
1
0
0
1
1
0
Xtal tuning cap [3 to 0]
mute
D2
D2
RX
1
0
0
0
1
x
1
clock div [2 to 0]
D1
D1
1
1
0
1
0
1
x
note 2
D0
D0
1
0
0
0
0
1
x