trcv012g5 ETC-unknow, trcv012g5 Datasheet - Page 11

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trcv012g5

Manufacturer Part Number
trcv012g5
Description
Trcv012g5 Gbits/s Trcv012g7 Gbits/s Gbits/s Limiting Amplifier, Clock Recovery, Data Demultiplexer
Manufacturer
ETC-unknow
Datasheet
Preliminary Data Sheet
August 2000
Clock and Data Recovery (CDR)
Clock Recovery Operation
The CDR circuit uses a PLL to extract the clock and retime the 2.5 Gbits/s data. The 2.5 Gbits/s data and the
2.5 GHz recovered clock are available as outputs, as well as a 155 MHz clock derived from the recovered clock.
Clock Recovery PLL Loop Filter
A typical loop filter that meets the OC-48 jitter transfer template is shown in Figure 4. Connect the filter compo-
nents and also connect LFP to VCP and connect LFN to VCN. The component values can be varied to adjust the
loop dynamic response (see Table 5).
Table 5. Clock Recovery Loop Filter Component Values
* Capacitor C1 should be either ceramic or nonpolar.
CDR Acquisition Time
The limiting amplifier plus CDR will acquire phase/frequency lock within 10 ms after powerup and a valid SONET
signal or a 2
CDR Generated Jitter
The limiting amplifier plus CDR’s generated jitter performance meets the requirements shown in Table 6. These
specifications apply to the jitter generated at the 2.5 Gbits/s recovered clock pins (CK2G5P/N) when the following
occur: no jitter is present on the input, the limiting amplifier’s input signal is within the valid level range given in
Table 9 on page 20, and the data sequence is a valid OC-48 SONET/SDH signal.
Table 6. Clock and Data Recovery Generated Jitter Specifications
* This denotes the device specification for system SONET/SDH compliance when the loop filter in Table 5 and Figure 4 is used.
Lucent Technologies Inc.
Generated Jitter (p-p):
Generated Jitter (rms):
Components
Measured with 12 kHz to 20 MHz Bandpass Filter
Measured with 12 kHz to 20 MHz Bandpass Filter
C2, C3
C1*
R1
R2
23
– 1 PRBS data signal is applied.
Parameter
Values for 2 MHz Loop Bandwidth
Figure 4. Clock Recovery PLL Loop Filter Components
0.47 F ± 10%
10 pF ± 20%
100 k ± 5%
82.5
Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer
± 5%
R
2
C
LFP/VCP
2
Typical
0.008
0.06
C
1
R
LFN/VCN
1
(Device)*
Max
0.10
0.01
C
3
TRCV012G5 and TRCV012G7
UIrms
UIp-p
Unit
5-8061(F).a
11

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