emc2106 Standard Microsystems Corp., emc2106 Datasheet - Page 40

• Manufacturer Part Number: emc2106
• Description: Emc2106 Dual Rpm-based Linear Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

Revision 1.74 (05-08-08)
5.16
5.16.1
5.17
5.18
i.e. CPU substrate PNP
substrate transistor
Typical remote
Local Ground
The diode connection for the External Diode 1 channel is determined at power-up based on the
SHDN_SEL pin (see
a 2N3904) or a substrate transistor (such as those found in an CPU or GPU) as shown in
The External Diode 3 channel supports any diode connection shown or it can be configured to operate
in anti-parallel diode (APD) mode. When configured in APD mode, a fourth temperature channel is
available that shares the DP3 and DN3 pins. When in this mode, both the external diode 3 channel
and external diode 4 channel thermal diodes must be connected as a diode.
Diode Faults
The EMC2106 actively detects an open and short condition on each measurement channel. When a
diode fault is detected, the temperature data MSByte is forced to a value of 80h and the FAULT bit is
set in the Status Register. When the External Diode 3 channel is configured to operate in APD mode,
the circuitry will detect independent open fault conditions, however a short condition will be shared
between the External Diode 3 and External Diode 4 channels.
The EMC2106 contains up to six (6) GPIO pins (all except GPIO6 are multiplexed with other functions).
The GPIO pins can be individually configured as an input or an output and as a push-pull or open-
drain output. Additionally, each GPIO pin, when configured as an input, can be individually enabled to
trigger an interrupt when they change states.
If a change of state occurs (such as a temperature out-of-limit condition or a GPIO changing states)
then the following will occur:
1. The appropriate status bits will be set in the Status Register and in the High, Low, and Fault Status
2. The ALERT# will be asserted if the specific channel interrupt is enabled (see
The ALERT# pin is cleared by setting the MASK bit, disabling the specific interrupt channel enable, or
reading the status registers. If the error conditions persist, then the status bits will remain set. Unless
the Interrupt Status Enable bits are cleared or the MASK bit is set, the ALERT# pin will likewise be set.
Diode Connections
GPIOs
Interrupts
Registers.
discrete PNP transistor
DP
DN
to
to
Typical remote
i.e. 2N3906
Section
Figure 5.7 Diode Connections
5.1.1). This channel can support a diode-connected transistor (such as
DATASHEET
Dual RPM-Based Linear Fan Controller with Hardware Thermal Shutdown
DN
DP
to
to
40
discrete NPN transistor
Typical remote
i.e. 2N3904
DP
DN
to
to
Anti-parallel diodes using
discrete NPN transistors
Diode 2
Section
Diode 1
SMSC EMC2106
6.15).
Figure
Datasheet
5.7.