at86rf211 ATMEL Corporation, at86rf211 Datasheet

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at86rf211

Manufacturer Part Number
at86rf211
Description
Fsk Transceiver For Ism Radio Applications
Manufacturer
ATMEL Corporation
Datasheet

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Features
Description
The AT86RF211 (aka: TRX01) is a single chip transceiver dedicated to low power
wireless applications, optimized for licence-free ISM band operations from 400 MHz to
950 MHz. Its flexibility and unique level of integration make it a natural choice for any
system related to telemetry, remote controls, alarms, radio modems, Automatic Meter
Reading, hand held terminals, high-tech toys, etc. The AT86RF211 makes bidirec-
tional communications affordable for applications such as secured transmissions with
hand-shake procedures, new features and services, etc. The AT86RF211 can easily
be configured to provide the optimal solution for the user’s application: choice of exter-
nal filters vs. technical requirements (bandwidth, selectivity, immunity, range, etc), and
software protocol (single channel, multiple channel, FHSS). The AT86RF211 is also
well adapted to battery operated systems, as it can be powered with only 2.4V. It also
offers a “Wake Up” receiver feature to save power by alerting the associated micro-
controller only when a valid inquiry is detected.
Multiband Transceiver: 400 MHz to 950 MHz
Monochip RF Solution: Transmitter-Receiver-Synthesizer
Integrated PLL and VCO: No External Coil
Very Resistant to Interferers by Design
Digital Channel Selection
200 Hz Steps
Data Rates up to 64 kbps with Data Clock and no Manchester Encoding Required
High Output Power Allowing Very Low Cost Printed Antennas:
FSK Modulation: Integrated Modulator and Demodulator
Power Savings:
100% Digital Interface through R/W Registers Including:
– +10 dBm in the 915 MHz Frequency Band
– +12 dBm in the 868 MHz Frequency Band
– +14 dBm in the 433 MHz Frequency Band
– Stand Alone "Sleep" Mode and "Wake-up" Procedures
– 8 Selectable Digital Levels for Output Power
– High Data Rate and Fast Settling Time of the PLL
– Oscillator Running Mode "Ready to Start"
– Analog FSK Discriminator Allowing Measurement and Correction of Frequency
– Digital RSSI
– V
Drifts
CC
Readout
FSK
Transceiver for
ISM Radio
Applications
AT86RF211
(aka: TRX01)
Rev. 1942C–WIRE–06/02
1

Related parts for at86rf211

at86rf211 Summary of contents

Page 1

... Readout CC Description The AT86RF211 (aka: TRX01 single chip transceiver dedicated to low power wireless applications, optimized for licence-free ISM band operations from 400 MHz to 950 MHz. Its flexibility and unique level of integration make it a natural choice for any system related to telemetry, remote controls, alarms, radio modems, Automatic Meter Reading, hand held terminals, high-tech toys, etc ...

Page 2

... If no correct sequence is received, the periodic scan continues correct message is detected, its data field is stored into the AT86RF211 ( bits) and an interrupt is generated on the WAKEUP pin. See Figure 2 and Figure 3. ...

Page 3

... NO processing): automatic data to frequency conversion. DATAMSG - DATAMSG = DATAMSG = AT86RF211 (TRX01) SLE, SCK, SDATA (for set-up) 3 AT86RF211 also acts like a "pipe": data (collected by the antenna) is available on pin DATAMSG: DATACLK DATAMSG DATAMSG DATACLK AT86RF211 Transmit mode F = Frequency of received signal ...

Page 4

... Data stored 3 Step correct header is received (mandatory) and address matches (if any), the data field is then stored into AT86RF211 and WAKEUP pin is activated (to wake-up the Microcontroller). The Microcontroller will then read the data into one of its registers, and begin a relevant procedure. ...

Page 5

... Block Diagram Figure 4. AT86RF211 Block Diagram RF FILTER These are the only blocks that depend on the selected ISM band (433, 868 or 915 MHz): dual band applications can be done by only switching them. Synthesizer, loop filter, IF filter(s), power supply decoupling are identical. TX/RX AERIAL MATCHING ...

Page 6

... All V pins must be connected in each functional mode (Tx, Rx, wake-up, PDN connected: Rx mode only, all but 17, 20 mode only, all but 17 36, 45 Pin 20 must remain unconnected or connected to ground AT86RF211 6 Pin Name Comments 25 SKFILT ...

Page 7

... F0 to F3). All circuitry is on-chip with the exception of the PLL loop filter. The phase comparison is made thanks to a charge pump topology. Typical charge pump current is 225 µA. AT86RF211 XTAL1 XTAL1 (1) ...

Page 8

... AT86RF211 8 Figure 7. Synthesizer Loop Filter Schematic Fref FILT1 Note: The PLL loop filter can be designed to optimize the phase noise around the carrier. Three configurations can be suggested, regarding the application and channel spacing: - Narrow band: (14 2.2 nF) // 220 pF - Typical: (3 5.6 nF) // 560 pF ...

Page 9

... Receiver Description Figure 8. Typical Expected Currents in Rx Mode 32.00 30.00 28.00 26.00 2.25 10.00 8.00 6.00 4.00 2.00 0.00 2.25 1942C–WIRE–06/02 Supply Current - Rx Mode 2.50 2.75 3.00 3.25 Vsupply (V) Detailed Current - Rx Mode 2.50 2.75 3.00 3.25 Vsupply (V) AT86RF211 868 or 915 MHz 433 MHz 3.50 3.75 4.00 4.25 EVCC2 EVCC1 RXVCC CVCC2 CVCC1 AVCC DIVCC IF2VCC TXVCC 3.50 3.75 4.00 4.25 9 ...

Page 10

... The insertion loss is about 2 dB and the reverse isolation about 300 environment. The immunity of the AT86RF211 can be improved with an external band-pass filter. For example, when using a SAW Filter, this device must be matched with the LNA input and the switch output. The following scheme gives the typical implementation for an 868 MHz application with a 50 /50 SAW filter ...

Page 11

... The LNA is directly coupled to the first mixer. Input and output of the LNA/Mixer must be connected through a capacitive link because of their internal DC coupling. A SAW or ceramic filter provides such a link. AT86RF211 λ 7Ω ...

Page 12

... IF1 filtering IF1 Gain and Second Mixer AT86RF211 12 Figure 11. Schematic Input of the LNA RXIN Figure 12. Schematic Output of the Mixer The first mixer translates the input RF signal down to 10.7 MHz or 21.4 MHz as chosen by the user. The local oscillator is provided by the same synthesizer which will generate a local frequency 10 ...

Page 13

... Available commercial filters with a 35 kHz BW allow data rates up to 19.6 kbps if crystal temperature drifts are very low. For faster communications and/or wider channelization, this ceramic filter can be replaced band-pass filter as proposed hereafter. AT86RF211 IF1 IF1IN (pin 35) "or" ...

Page 14

... IF2 Amplifier Chain AT86RF211 14 Figure 16. LC Band-pass Filter 10 nF Filter gain ~ F1 40 kHz or higher • capacitors cut DC response forward and backward. • The first network has the low cut-off frequency. • The second network has the high cut-off frequency. The input impedance of the IF2 amplifier is 1700 . This value enables the use of popu- lar filters with impedance between 1500 and 2000 ...

Page 15

... RSSI value is above this threshold. Some hysteresis effect may be added (see CTRL1 register’s content). The AT86RF211 also has the possibility to measure another voltage. The ADC measur- ing the RSSI can be turned into voltage or discriminator output DC level measurement. ...

Page 16

... FSK Demodulator AT86RF211 16 Figure 19. ADC Converter Input Selection RSSI M U Vcc supply M X Voltage U DISCOUT X (MOFFSET) CTRL1[1] Note: For voltage measurement, the LSB weighs 85 mV and the reference voltage is 1.25V. The ADC measuring the RSSI can be turned into voltage or discriminator output DC level measurement ...

Page 17

... DC-free modulation scheme (it is possible to send a "0" or "1" infinitely). Figure 21. Schematic of the Data Slicer DATAMSG + - Choice of internal or external reference for the data slicer AT86RF211 and 2.4V. CC DISCOUT + - + - DSIN 4 bits + Σ ...

Page 18

... Figure 22. How to Set Up the Data Slicing Parameters DISCOUT: demodulated data AT86RF211 18 To operate this way, the user must make sure that the "0" and "1" level at the output of the discriminator are "on both sides" of the comparison level in order for the decision to be made properly ...

Page 19

... Transmitter Description Figure 23. Typical Expected Currents in Tx Mode 65.00 60.00 55.00 50.00 45.00 40.00 35.00 30.00 25.00 20.00 15.00 2.25 30.00 25.00 20.00 15.00 10.00 5.00 0.00 2.25 1942C–WIRE–06/02 Supply Current - Tx Mode 2.50 2.75 3.00 3.25 Vsupply (V) Detailed Current - Tx Mode 2.50 2.75 3.00 3.25 Vsupply (V) AT86RF211 915MHz 868MHz 433MHz 3.50 3.75 4.00 4.25 PA TXVCC EVCC2 EVCC1 CVCC2 CVCC1 RXVCC DIVCC 3.50 3.75 4.00 4.25 19 ...

Page 20

... RF PA output Note: The filter is designed to meet relevant regulations. Please refer to application note for details. AT86RF211 20 The Power Amplifier has been built to deliver more than +10 dBm, i. the three popular frequency bands. This power level is intended to be measured on the aerial port with a correct output matching network. Note that a correct calculation of the matching network guarantees an optimal power efficiency ...

Page 21

... POWER the nominal value for a +10 dBm output in the 868 MHz frequency band. Decreasing this value will lead to +14 dBm at 433 MHz, +12 dBm at 868 MHz, +10 dBm at 915 MHz (typical values for conducted output power). AT86RF211 ref R POWER ...

Page 22

... Note: Unless otherwise specified, typical data given for R The application microcontroller can control and monitor the AT86RF211 through a syn- chronous, bidirectional, serial interface made of 3 wires: • SLE: enable input • SCK: clock input • SDATA: data in/out When SLE = ‘ ...

Page 23

... When trying to write more data than the register length, data field is written on the first extra rising clock edge regarding register length. A[1] A[ D[9] D[8] D[7] D[6] The complete register of 10 bits is updated on a rising edge of SLE A[0] A[3] A[2] A[1] AT86RF211 DATA bits (variable length) MSB D[nbit-1:0] D[5] D[4] D[3] D[2] D[1] D[0] D[31] D[30] LSB 23 ...

Page 24

... Figure 32. Read chronogram: Partial Read Cycle, Reading 2 bits SLE SCK SDATA SDATA mode AT86RF211 24 Only the 2 MSBs are updated on the rising edge of SLE; other register bits are unchanged. • READ Mode (R The address and R/W bits are clocked on the rising edge of SCK. ...

Page 25

... R 6 R-W 32 R-W 18 R R-W AT86RF211 tdle tpzd OUTPUT INPUT Comments F0 Frequency Code F1 Frequency Code F2 Frequency Code F3 Frequency Code Main Control Register Status Register Data Slicer Reference/Discriminator offset adjusting Wake-up Control Register Wake-up Data Rate Register Wake-up Address Register Wake-up Data Register ...

Page 26

... Register reset value = (10000270 ) AT86RF211 26 Name nbit Writing in this register ( triggers an asynchronous reset. This register can only be written. All registers return to reset state. The chip returns in power-down. So all the following blocks are reset: • All registers to default value • ...

Page 27

... Table 6. CTRL1 Detailed Description Number Name of Bits Comments PDN 1 General power-down 0: power down mode; only the serial interface is active 1: AT86RF211 activated RXTX 1 Reception or transmission selection 0: Rx mode 1: Tx mode DATACLK 1 DATA clock recovery selection 0: no signal on DATACLK output pin 1: Clock recovery active: DATACLK activated ...

Page 28

... RSSI is kept into STATUS Register). This can disturb the reception process (if a threshold is used for DATAMSG validation). So not recommended to measure measurement can not be done when the AT86RF211 is in power-down mode While in V measurement possible to measure the DC output of the discriminator. ...

Page 29

... The best value of DATATOL is a trade-off between these considerations. The typical recommended value of RATETOL DATARATE. AT86RF211 N0LD1 N1LD2 8-5 4-0 (0010) ...

Page 30

... Figure 34. Clock Recovery DATAMSG DATACLK AT86RF211 30 If the tolerance is too high, the rate value is reached earlier, and the rate value could be unstable (too big step). If the tolerance is too low, it could be difficult to catch up the DATA and the function could get lost. Notice that maximum acceptable distance between two data transitions depends on the precision of DATARATE versus transmitter actual data rate ...

Page 31

... N1LD2 triggers the lock condition of the PLL. N1LD2 = number of cycle at the PLL reference frequency, without any unlock condition before considering PLL locked. This value must not be set recommended to use default values indicated in the table. AT86RF211 Period 1 bit ~ 1067 bit ~ 2135 bit ~ 4269 x T ...

Page 32

... Frequency Registers AT86RF211 32 Table 9. Frequency Registers Name nbit Number Name of bits Comments F0 32 Frequency code value F0 default register in TX mode ("0" code in FSK modulation Frequency code value F1 default register in TX mode ("1" code frequency in FSK modulation Frequency code value F2 default register in RX mode ...

Page 33

... F1), or (F2 & F3) must be programmed for “0” code and “1” code transmission. The DATAMSG pin value actually selects the used register. The four registers can also be set to define two channels, so that the AT86RF211 may switch quickly from a channel to the other. ...

Page 34

... DTR Register AT86RF211 34 Table 11. Status Register Detailed Description Number Name of bits Comments PLLL 1 PLL Lock flag 0: PLL unlocked 1: PLL locked MRSSI 6 Measured RSSI level MVCC 6 Measured V MOFFSET = 1 WAKEUP 1 WAKEUP flag Copy of the WAKEUP pin, but not affected by polarity selection wake-up message received ...

Page 35

... DISCLOW 1 Discriminator offset shift (low shift 1: output level decreased STOP DATL 30 29 28- (11111) 2 ISTU AT86RF211 to (1111 reset value: (1000) ADD – WPER 23 22 21- (001011111) – reset value: 0 reset value: 0 WL1 ...

Page 36

... Variable as multiple of WL1 from WL1 ISTU 1 Inhibit stuff mechanism 0: stuff is used for wake-up message 1: no stuff used in the wake-up message - 2 Reserved, must be kept to reset value AT86RF211 bit (min data length value bits bits (max data length value) 2 • ...

Page 37

... AT86RF211 Prescaler Comments (1+ (vv + 1270 1280 ms 16 ((16 x 1)+ ((16 x 2)+ ((16 x vv)+ ...

Page 38

... WUOP nbit 17-16 init (01) 2 Table 20. WUR Detailed Description Name Number of bits WUOP 2 RATECHK 1 RATE 10 RATETOL 5 AT86RF211 38 • WL2 programming WL2 can be set as a multiple of WL1 from WL1. Table 18. WL2 Programming WL2[2:0] Period (000 (001 WL1 2 (010 WL1 2 ...

Page 39

... Concerning this register, attention should be paid to the fact that the last bit of the address field is not taken into account when testing the address field that is received. Thus the last bit must be programmed and counted in the address length but it can be either "0" or "1". AT86RF211 640000 RATE = ...

Page 40

... WUC) data length is given by DATL of WUC. * case variable data length (STOP = 1 of WUC) data length is given by MSGDATL of STAT register. Warning: The first bit of received data is the LSB: WUD[0]. Note: To use this mode, please refer to the corresponding application note. AT86RF211 40 WUD (data length - 1942C–WIRE–06/02 ...

Page 41

... Supply current 29 Supply current 35 Supply current 20 Operating temperature -40 Note: 1. The allowed supply voltage of the AT86RF211 is higher than 3.75V. However, we strongly recommend not to exceed 3.75V from now on compliant with future versions of the device. AT86RF211 +95°C -65 to +150° 3.95V -0 0.3V ...

Page 42

... Delay to switch SDATA to input (tri-state) after SLE rising (read mode) (1) C Max load for CMOS output pins L Note: These timings refer to the Figure 33 on page 25. AT86RF211 42 Unless otherwise specified, data is given for T = 25°C, V Conditions (1) Iol = 1 mA (1) Ioh = - 1 mA Conditions ...

Page 43

... Unless otherwise specified, data is given for T = 25°C V Typ Max Unit 10.7 MHz 330 455 kHz 1700 -105 dBm 15 dB -15 dBm -5 dBm AT86RF211 = 2.7V SUPPLY Unit Comments MHz Digital programming MHz Digital programming MHz 10.7 MHz MHz 21.4 MHz ms Depending on crystal specifications µs From oscillator settling µ ...

Page 44

... The maximum power is set by an external resistor, connected to pin R grammed/re-programmed -12 dB below this limit, by means of a 3-bit word: TXLVL of CTRL1 register. 3. The output power is regulated against process, temperature and power supply variations by an internal ALC loop. AT86RF211 44 Unless otherwise specified, data is given for T = 25° ...

Page 45

... Implementation Rpower ANTENNA Note: Accurate information about parts and values of components to be used around AT86RF211 are described in our application notes. "RF Bill-of-Material/cost for 868-915 MHz applications". 1942C–WIRE–06/02 Optional V CC SAW Filter SAW V CC AT86RF211 ...

Page 46

... Decoupling capacitors remain close to the supply pins Reference Design Bottom Layer One-block ground plane with no slot under the whole RF area This small slot is allowed under the RF211: thus there is no track above AT86RF211 46 1942C–WIRE–06/02 ...

Page 47

... A 1.60 A1 0.05 min/0.15 max A2 1.40 D 9.00 D1 7.00 E 9.00 E1 7.00 L 0.60 e 0.50 b 0.22 ccc 0.1 Ordering information Full Part Number AT86RF211 DAI AT86RF211 DAI-R 1942C–WIRE–06/02 48 lead TQFP Tolerance Dimension max ± 0.05 ± 0.20 ±0.10 ±0.20 ±0.10 +0.15/-0.10 basic ±0.05 max Package TQFP48 TQFP48 AT86RF211 Nominal Value (inch) A 0.063 A1 0 ...

Page 48

... Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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