tfra08c13 ETC-unknow, tfra08c13 Datasheet - Page 103

• Manufacturer Part Number: tfra08c13
• Description: Tfra08c13 Octal T1/e1 Framer
• Manufacturer: ETC-unknow

Preliminary Data Sheet
October 2000
Lucent Technologies Inc.
Lucent Technologies Inc.
Concentration Highway Interface
CHI Timing with Associated Signaling Mode Enabled
Figure 39 illustrates the CHI frame timing when the associated signaling mode is enabled (register FRM_PR44 bit
2 (ASM) = 1) and the CHIDTS mode is disabled (registers FRM_PR65 bit 1 (TCHIDTS) = 0 and FRM_PR66 bit 1
(RCHIDTS) = 0). The frames are 125 ms long and consist of 32 contiguous 16-bit time slots.
In DS1 frame formats, each frame consists of 24 time slots and eight stuffed time slots. Each time slot consists of
two octets.
In CEPT modes, each frame consists of 32 time slots. Each time slot consists of two octets.
CHI Timing with Associated Signaling Mode and CHIDTS Enabled
Figure 40 illustrates the CHI frame timing in the associated signaling mode (register FRM_PR44 bit 2 (ASM) = 1)
and CHIDTS enabled (registers FRM_PR65 bit 1 (TCHIDTS) = 1 and FRM_PR66 bit 1 (RCHIDTS) = 1).
* High-impedance state for TCHIDATA and not received (don’t care) for RCHIDATA.
4.096 Mbits/s CHI:
8.192 Mbits/s CHI:
RCHIDATA
RCHIDATA
TCHIDATA
TCHIDATA
8.192 Mbits/s CHI WITH ASM (ASSOCIATED SIGNALING MODE) ENABLED
CHIFS
RCHIDATA
TCHIDATA
or
Figure 39. Associated Signaling Mode Concentration Highway Interface Timing
OR
*
DATA SIGNALING
DATA 0
1 TIME SLOT
16 bits
DATA AND SIGNALING BYTES ARE INTERLEAVED
Figure 40. CHI Timing with ASM and CHIDTS Enabled
TS0
FRAME 1
FRAME 1
FRAME = 64 bytes: 32 DATA + 32 SIGNALING
1 TIME SLOT
SIGNALING 0
16 bits
*
(continued)
FRAME 1
FRAME
TS1
125 s
HIGH IMPEDANCE
DATA 31
TFRA08C13 OCTAL T1/E1 Framer
TS31
SIGNALING 31
*
DATA SIGNALING
TS0
DATA 0
FRAME 2
FRAME 2
FRAME 2
5-5270(F).ar.3
5-6454(F).ar.2
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