rt8100 Richtek Technology Corporation, rt8100 Datasheet - Page 6

• Manufacturer Part Number: rt8100
• Description: Synchronous Buck Dc/dc With Dual Voltage Control Mode
• Manufacturer: Richtek Technology Corporation

RT8100
Power on reset
The POR circuitry monitors the supply voltage of the chip.
When the chip power supply exceeds 4.2V, the chip
releases the reset state and works according to the
settings. Once the supply voltage is lower than 4.0V, POR
circuitry resets the chip.
V
The V
source when power up. As V
for ramp setting and the chip is in ramp setting mode. The
voltage at RR pin will be about 0.5V. Otherwise, the chip
will be in V
ramp setting until V
UGATE and LGATE will be off and SS will be pulled low by
a constant current of 10uA. The chip will enter the ramp
setting mode and SS will re-softstart when V
Enable
After POR reset, the chip monitors the voltage of PI pin.
When PI is higher than 0.3V, the chip is
is disabled when V
threshold voltage, the PI pin can be used for power
sequence.
Soft-start
A constant current of 10uA starts to charge the capacitor
connected to SS pin right after the
up and enabled. The ramp voltage on SS pin is also used
to clamp the comp voltage during soft-start, which
automatically constraints the output current due to the
nature of current mode topology. This brings up
inrush current and smooth output voltage ramp. The SS
pins are also used as the timer during OCP hiccup.
Frequency setting
The converter switching frequency is programmed by
connecting a resistor from the RT pin to GND. The
frequency vs. R
Characteristics”.
Output voltage setting and control
Control loops consist of an error amplifier, a pulse width
modulator, current feed back components, a gate driver
and power components. The internal high accuracy bias
www.richtek.com
6
IN
detection
IN
detection circuitry
IN
detection mode and RR pin is disabled for
RT
IN
PI
plot is shown in “Typical Operating
is lower than 0.3V. With a precise
> 1.8V. In V
monitors the switching power
IN
> 1.8V, RR pin is enabled
chip has been powered
IN
detection mode, the
enabled. The chip
IN
> 1.8V.
smaller
Preliminary
provides the reference voltage of 0.8V at the non-inverting
input of both error amplifiers. The output voltage is
programmed by using a voltage divider at output and feeding
the voltage division back to corresponding error amplifiers.
As conventional current mode PWM controller, the output
voltage is locked at the V
signal is used as the control signal of pulse width
modulator. The PWM signals are generated by comparison
of EA output and current ramp waves. Power stage
transforms V
IN
to output by PWM signal on-time ratio.
REF
of error amplifier and the error
DS8100-03 August 2007