rt8100 Richtek Technology Corporation, rt8100 Datasheet - Page 14

• Manufacturer Part Number: rt8100
• Description: Synchronous Buck Dc/dc With Dual Voltage Control Mode
• Manufacturer: Richtek Technology Corporation

RT8100
There is another type of compensation called Type 3
compensation that adds a pole-zero pair to the Type 2
network. It's used to compensate output capacitor whose
ESR value is much lower (pure MLCC or OSCON
Capacitors).
As shown in Figure 9, to insert a network between V
and FB in the original Type 2 compensation network can
result in Type 3 compensation. Figure 10 shows the
difference of their AC response. Type 3 compensation has
an additional pole-zero pair that causes a gain boost at
the flat gain region. But the gain boosted is limited by the
ratio (R1+R4)/R4; if R3 << R4.
www.richtek.com
14
F
Figure 9. Additional Network of Type 3 Compensation
P3
V
OUT
Figure 10. AC Response Curves of Type 2 and 3
-20
-40
-60
80
60
40
20
0
- 4 0
- 6 0
8 0
4 0
0
1 0 H z
10
Add Type 3 compensation
Modulator
v d b ( v o ) v d b ( c o m p 2 ) v d b ( l o )
Gain
F
C3
Z1
(Add between V
Original Type 3 compensation
Figure 8. Type 2 Bode Plot
R1
100
1 0 0 H z
Loop Gain
R3
F
Z2
FB
R4
1k
Frequency (Hz)
1 . 0 K H z
+
-
F r e q u e n c y
GM
OUT
F
P1
1 0 K H z
10k
and FB)
R2
C2
Compensation
100k
1 0 0 K H z
Gain
Pole
F
P2
C1
V
1 . 0 M H z
1M
COMP
Preliminary
OUT
Type 3 will induce three poles and two zeros.
Zeros :
Poles :
which is in the origin.
We recommend F
F
Figure 11 shows Type 3 Bode Plot.
Protection
OCP
The RT8100 use cycle by cycle current comparison. The
over current level is set by R
occurs and SS > (5VSB −1.3), a constant current of 10μA
starts to discharge the capacitor connected to SS pin right
away. When OC occurs UGATE and LGATE will be off.
When the voltage at the capacitor connected to SS pin
pass about 0.4V, a constant current of 10μA starts to charge
the capacitor.
P(LC)
F
F
F
F
F
P1
P2
P3
Z1
Z2
-20
-40
-60
-80
60
40
20
; F
0
=
=
=
=
=
2
2
2
2
2
2
P1
π
π
π
π
π
placed in F
×
×
×
×
×
R2
R2
R3
(
⎛
⎜
⎝
1
R1
1
R1
Figure 11. Type 3 Bode Plot
×
×
×
R1
+
1
3
×
1
C2
1
⎛
⎜
⎝
C3
Z1
R3)
R3
C1
C1
+
placed in 0.5 x F
R3
×
+
×
×
ESR
C2
C2
C1
Log Frequency
C3
Loop Gain
4
⎞
⎟
⎠
⎞
⎟
⎠
CSN
and F
;
resistor. When OC function
Modulator Gain
DS8100-03 August 2007
P2
5
placed in 0.5 x F
Compensation Gain
P(LC)
Gain
; F
6
Z2
placed in
7
SW
.