89hpes12t3g2 Integrated Device Technology, 89hpes12t3g2 Datasheet - Page 8

• Manufacturer Part Number: 89hpes12t3g2
• Description: 12-lane, 3-port Gen2 Pcie I/o Expansion Switch
• Manufacturer: Integrated Device Technology

Pin Characteristics
IDT 89HPES12T3G2 Data Sheet
Note: Some input pads of the PES12T3G2 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate
levels. This is especially critical for unused control signal inputs which, if left floating, could adversely affect operation. Also, any input pin left
floating can cause a slight increase in power consumption.
PCI Express Inter-
face
SMBus
General Purpose I/O
System Pins
EJTAG / JTAG
Function
PE0RN[3:0]
PE0RP[3:0]
PE0TN[3:0]
PE0TP[3:0]
PE2RN[3:0]
PE2RP[3:0]
PE2TN[3:0]
PE2TP[3:0]
PE4RN[3:0]
PE4RP[3:0]
PE4TN[3:0]
PE4TP[3:0]
PEREFCLKN[0]
PEREFCLKP[0]
REFCLKM
MSMBADDR[4:1]
MSMBCLK
MSMBDAT
SSMBADDR[5,3:1]
SSMBCLK
SSMBDAT
GPIO[11,7:0]
CCLKDS
CCLKUS
MSMBSMODE
PERSTN
RSTHALT
SWMODE[2:0]
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST_N
Pin Name
Table 8 Pin Characteristics (Part 1 of 2)
Type
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
8 of 31
Buffer
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
CML
Serial Link
High Drive
Diff. Clock
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
STI
I/O
STI,
STI
STI
STI
STI
STI
STI
STI
STI
2
Resistor
Internal
pull-down
pull-down
pull-down
pull-down
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
pull-up
1
pull-up on board
pull-up on board
pull-up on board
pull-up on board
Refer to Table 9
Notes
March 27, 2008