89hpes12n3 Integrated Device Technology, 89hpes12n3 Datasheet - Page 13

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89hpes12n3

Manufacturer Part Number
89hpes12n3
Description
12-lane, 3-port Pcie I/o Expansion Switch
Manufacturer
Integrated Device Technology
Datasheet

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Power-Up Sequence
PES12N3, the power-up sequence must be as follows:
are avoided. There are no maximum time limitations in ramping to valid power levels. The power-down sequence must be in the reverse order of the
power-up sequence.
Power Consumption
Table 14.
IDT 89HPES12N3 Data Sheet
This section describes the sequence in which various voltages must be applied to the part during power-up to ensure proper functionality. For the
1. V
2. V
3. V
When powering up, each voltage level must ramp and stabilize prior to applying the next voltage in the sequence to ensure internal latch-up issues
Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 14.
Maximum power is measured under the following conditions: 70°C Ambient, 85% total link usage on all ports, maximum voltages defined in
All power measurements assume that the part is mounted on a 10 layer printed circuit board with 0 LFM airflow.
Port-A/Port-B/Port-C
Connected Lanes:
Number of
DD
DD
TT
PE — 1.5V
I/O — 3.3V
Core, V
1/1/1
4/1/1
4/4/4
DD
PE, V
DD
(1.0V supply)
APE — 1.0V
Core (Watts)
Typ
0.52
0.56
0.65
Max
0.67
0.76
0.89
(1.0V supply)
PCIe Digital
Typ
0.27
0.47
0.68
(Watts)
Table 14 PES12N3 Power Consumption
Max
0.36
0.58
0.81
13 of 28
(1.0V supply)
PCIe Analog
Typ
0.13
0.19
0.21
(Watts)
Max
0.16
0.21
0.25
(1.5V supply)
PCIe Termin-
ation (Watts)
Typ
0.11
0.22
0.38
Max
0.13
0.26
0.51
(3.3V supply)
Typ
0.01
0.01
0.01
I/O (Watts)
Max
0.01
0.01
0.01
Total (Watts)
Typ
1.04
1.44
1.92
July 18, 2006
Max
1.33
1.81
2.47

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