89hpes16nt2 Integrated Device Technology, 89hpes16nt2 Datasheet
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89hpes16nt2
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89hpes16nt2 Summary of contents
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... Device Overview The 89HPES16NT2 is a member of the IDT PRECISE™ family of PCI Express® switching solutions offering the next-generation I/O inter- connect standard. The PES16NT2 is a 16-lane, 2-port peripheral chip that provides high-performance switching and non-transparent bridging (NTB) functions between a PCIe® upstream port and an NTB down- stream port ...
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... IDT 89HPES16NT2 Data Sheet ◆ Reliability, Availability, and Serviceability (RAS) Features – Internal end-to-end parity protection on all TLPs ensures data integrity even in systems that do not implement end-to-end CRC (ECRC) – Supports ECRC pass-through – Supports Hot-Swap ◆ Power Management – ...
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... IDT 89HPES16NT2 Data Sheet Pin Description The following tables list the functions of the pins provided on the PES16NT2. Some of the functions listed may be multiplexed onto the same pin. The active polarity of a signal is defined using a suffix. Signals ending with an “N” are defined as being active, or asserted, when at a logic zero (low) level ...
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... IDT 89HPES16NT2 Data Sheet Signal MSMBADDR[4:1] MSMBCLK MSMBDAT SSMBADDR[5,3:1] SSMBCLK SSMBDAT Signal GPIO[0] GPIO[1] GPIO[2] GPIO[3] GPIO[4] GPIO[5] GPIO[6] GPIO[7] Type Name/Description I Master SMBus Address. These pins determine the SMBus address of the serial EEPROM from which configuration information is loaded. I/O Master SMBus Clock. This bidirectional signal is used to synchronize transfers on the master SMBus ...
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... IDT 89HPES16NT2 Data Sheet Signal CCLKDS CCLKUS MSMBSMODE PENTBRSTN PERSTN RSTHALT SWMODE[3:0] Signal JTAG_TCK JTAG_TDI Type Name/Description I Common Clock Downstream. When the CCLKDS pin is asserted, it indi- cates that a common clock is being used between the downstream device and the downstream port. I Common Clock Upstream. When the CCLKUS pin is asserted, it indi- cates that a common clock is being used between the upstream device and the upstream port ...
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... IDT 89HPES16NT2 Data Sheet Signal JTAG_TDO JTAG_TMS JTAG_TRST_N Signal V CORE APE Type Name/Description O JTAG Data Output. This is the serial data shifted out from the boundary scan logic or JTAG Controller. When no data is being shifted out, this signal is tri-stated ...
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... IDT 89HPES16NT2 Data Sheet Pin Characteristics Note: Some input pads of the PES16NT2 do not contain internal pull-ups or pull-downs. Unused inputs should be tied off to appropriate levels. This is especially critical for unused control signal inputs which, if left floating, could adversely affect operation. Also, any input pin left floating can cause a slight increase in power consumption ...
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... IDT 89HPES16NT2 Data Sheet Logic Diagram — PES16NT2 Reference Clocks PCI Express Switch SerDes Input Port A PCI Express Switch SerDes Input Port C MSMBADDR[4:1] Master SMBus Interface SSMBADDR[5,3:1] Slave SMBus Interface MSMBSMODE System Functions SWMODE[3:0] 2 PEREFCLKP 2 PEREFCLKN REFCLKM PEALREV PEARP[0] PEARN[0] PEARP[1] ...
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... IDT 89HPES16NT2 Data Sheet System Clock Parameters Values based on systems running at recommended supply voltages and operating temperatures, as shown in Tables 12 and 13. Parameter Refclk Input reference clock frequency range FREQ 2 Refclk Duty cycle of input clock Rise/Fall time of input clocks Differential input voltage swing ...
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... IDT 89HPES16NT2 Data Sheet Parameter T Max time between jitter median & max deviation RX-EYE-MEDIUM TO MAX JITTER T Unexpected Idle Enter Detect Threshold Integration Time RX-IDLE-DET-DIFF- ENTER TIME T Lane to lane input skew RX-SKEW 1. Minimum, Typical, and Maximum values meet the requirements under PCI Specification 1.1 ...
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... IDT 89HPES16NT2 Data Sheet JTAG_TCK JTAG_TDI JTAG_TMS JTAG_TDO JTAG_TRST_N Recommended Operating Supply Voltages Symbol Parameter V CORE Internal logic supply DD V I/O I/O supply except for SerDes LVPECL/CML PCI Express Digital Power DD V APE PCI Express Analog Power PCI Express Serial Data Transmit Termina- ...
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... IDT 89HPES16NT2 Data Sheet Recommended Operating Temperature Commercial Power Consumption Typical power is measured under the following conditions: 25°C Ambient, 35% total link usage on all ports, typical voltages defined in Table 14. Maximum power is measured under the following conditions: 70°C Ambient, 85% total link usage on all ports, maximum voltages defined in Table 14 ...
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... IDT 89HPES16NT2 Data Sheet DC Electrical Characteristics Values based on systems running at recommended supply voltages, as shown in Table 12. Note: See Table 7, Pin Characteristics, for a complete I/O listing. I/O Type Parameter Serial Link PCIe Transmit V Differential peak-to-peak output voltage TX-DIFFp-p V De-emphasized differential output voltage TX-DE-RATIO V DC Common mode voltage ...
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... IDT 89HPES16NT2 Data Sheet I/O Type Parameter Other I/Os LOW Drive I OL Output I OH High Drive I OL Output I OH Schmitt Trig ger Input V IH (STI) Input Capacitance C IN Leakage Inputs I/O / LEAK W O Pull-ups/downs I/O LEAK WITH Pull-ups/downs 1. Minimum, Typical, and Maximum values meet the requirements under PCI Specification 1.0a. ...
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... IDT 89HPES16NT2 Data Sheet Package Pinout — 484-BGA Signal Pinout for PES16NT2 The following table lists the pin numbers and signal names for the PES16NT2 device. Pin Function Alt Pin A1 V B13 B14 CORE B15 B16 SS A5 PEATN07 ...
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... IDT 89HPES16NT2 Data Sheet Pin Function Alt Pin G5 V H20 H21 H22 G10 G11 G12 G13 G14 V APE J7 DD G15 G16 G17 V IO J10 DD G18 V J11 ...
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... IDT 89HPES16NT2 Data Sheet Pin Function Alt Pin N21 V PE R14 TT N22 V PE R15 TT P1 PEREFCLKP0 R16 P2 PEREFCLKN0 R17 P3 V R18 R19 R20 R21 R22 CORE T2 DD P10 P11 V CORE T4 DD P12 ...
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... IDT 89HPES16NT2 Data Sheet Pin Function Alt Pin Y15 RSTHALT AA6 Y16 GPIO_02 1 AA7 Y17 GPIO_05 1 AA8 Y18 MSMBSMODE AA9 Y19 V AA10 SS Y20 V AA11 SS Y21 PEREFCLKP1 AA12 Y22 PEREFCLKN1 AA13 AA1 V AA14 SS AA2 V AA15 SS AA3 V CORE AA16 DD AA4 V CORE AA17 DD AA5 ...
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... IDT 89HPES16NT2 Data Sheet Power Pins V Core V Core J10 C3 J12 C20 J14 C21 K3 C22 K11 E4 K13 F3 K15 L10 H6 L12 H8 L14 H10 M6 H13 M9 H15 M11 Core V Core M13 U16 F6 M15 ...
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... IDT 89HPES16NT2 Data Sheet Ground Pins D13 A8 D15 A10 D17 A12 D19 A14 D20 A16 E3 A18 E5 A20 E6 A21 E11 A22 E14 B1 E17 B2 E18 B4 E21 B6 E22 B8 F1 B10 F2 B12 F4 B14 F5 B16 F7 B18 F16 B20 F17 B21 F19 ...
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... IDT 89HPES16NT2 Data Sheet Signals Listed Alphabetically Signal Name CCLKDS CCLKUS GPIO_00 GPIO_01 GPIO_02 GPIO_03 GPIO_04 GPIO_05 GPIO_06 GPIO_07 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST_N MSMBADDR_1 MSMBADDR_2 MSMBADDR_3 MSMBADDR_4 MSMBCLK MSMBDAT MSMBSMODE PEALREV PEARN00 PEARN01 PEARN02 PEARN03 PEARN04 PEARN05 PEARN06 PEARN07 PEARP00 ...
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... IDT 89HPES16NT2 Data Sheet Signal Name PEARP03 PEARP04 PEARP05 PEARP06 PEARP07 PEATN00 PEATN01 PEATN02 PEATN03 PEATN04 PEATN05 PEATN06 PEATN07 PEATP00 PEATP01 PEATP02 PEATP03 PEATP04 PEATP05 PEATP06 PEATP07 PECLREV PECRN00 PECRN01 PECRN02 PECRN03 PECRN04 PECRN05 PECRN06 PECRN07 PECRP00 PECRP01 PECRP02 PECRP03 PECRP04 ...
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... IDT 89HPES16NT2 Data Sheet Signal Name PECRP06 PECRP07 PECTN00 PECTN01 PECTN02 PECTN03 PECTN04 PECTN05 PECTN06 PECTN07 PECTP00 PECTP01 PECTP02 PECTP03 PECTP04 PECTP05 PECTP06 PECTP07 PENTBRSTN PEREFCLKN0 PEREFCLKN1 PEREFCLKP0 PEREFCLKP1 PERSTN REFCLKM RSTHALT SSMBADDR_1 SSMBADDR_2 SSMBADDR_3 SSMBADDR_5 SSMBCLK SSMBDAT I/O Type Location I G19 ...
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... IDT 89HPES16NT2 Data Sheet Signal Name SWMODE_0 SWMODE_1 SWMODE_2 SWMODE_3 V CORE APE I/O Type Location I AA13 I Y13 I AB14 I AA14 See Table 18 for a listing of power pins. See Table 19 for a listing of ground pins. Table 20 89PES16NT2 Alphabetical Signal List (Part ...
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... IDT 89HPES16NT2 Data Sheet PES16NT2 Pinout — Top View Core (Power I/O (Power ...
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... IDT 89HPES16NT2 Data Sheet PES16NT2 Package Drawing — 484-Pin BC484/BCG484 January 14, 2008 ...
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... IDT 89HPES16NT2 Data Sheet PES16NT2 Package Drawing — Page Two January 14, 2008 ...
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... IDT 89HPES16NT2 Data Sheet Revision History March 15, 2007: Initial publication of Advanced data sheet. March 26, 2007: Revised pin list. April 11, 2007: In Table 2, revised description of MSMBCLK. June 1, 2007: Revised pins in Tables 16, 18, and 19 and in pinout graphic. June 19, 2007: In Tables 16 and 20, changed the names of PEREFCLKN[2/1] to PEREFCLKN[1/0] and PEREFCLKP[2/1] to PEREFCLKP[1/0]. ...
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... IDT 89HPES16NT2 Data Sheet Ordering Information A AAA NN Product Operating Device Family Family Voltage Valid Combinations 89HPES16NT2ZABC 484-ball CABGA package, Commercial Temperature 89HPES16NT2ZABCG 484-ball Green CABGA package, Commercial Temperature CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 ® NNAAN AA AA ...