mt90823ap1 Zarlink Semiconductor, mt90823ap1 Datasheet - Page 24
mt90823ap1
Manufacturer Part Number
mt90823ap1
Description
2048 X 2048 Channels Selectable Rate 2, 4, 8 Mbps 3.3 V Non-blocking Large Digital Switch Ldx
Manufacturer
Zarlink Semiconductor
Datasheet
1.MT90823AP1.pdf
(46 pages)
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Test Data Register
As specified in IEEE 1149.1, the MT90823 JTAG Interface contains three test data registers:
•
•
•
The MT90823 boundary scan register contains 118 bits. Bit 0 in Table 15 Boundary Scan Register is the first bit
clocked out. All tristate enable bits are active high.
The Boundary-Scan Register
The Boundary-Scan register consists of a series of Boundary-Scan cells arranged to form a scan path
around the boundary of the MT90823 core logic.
The Bypass Register
The Bypass register is a single stage shift register that provides a one-bit path from TDI to its TDO.
The Device Identification Register
The device identification register is a 32-bit register with the register contain of:
0000 0000 1000 0010 0011 0001 0100 1011
MSB
The LSB bit in the device identification register is the first bit clocked out.
Zarlink Semiconductor Inc.
LSB
MT90823
24
Data Sheet
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