m21120 Mindspeed Technologies, m21120 Datasheet

no-image

m21120

Manufacturer Part Number
m21120
Description
M21120 Crosspoint Switch Data Sheet
Manufacturer
Mindspeed Technologies
Datasheet
21120-DSH-001-B, 3/27/03
M21120
34 x 34 3.2 Gbps Crosspoint Switch with Input Equalization
Data Sheet
Terminal Descriptions - 5
Specification Tables - 7
Features - 4
Functional Description - 17
Register Information - 21
Package Information - 29
World Wide Sales Companies - 38
Mindspeed Technologies™

Related parts for m21120

m21120 Summary of contents

Page 1

... M21120 3.2 Gbps Crosspoint Switch with Input Equalization Data Sheet Features - 4 Terminal Descriptions - 5 Specification Tables - 7 Functional Description - 17 Register Information - 21 Package Information - 29 World Wide Sales Companies - 38 21120-DSH-001-B, 3/27/03 Mindspeed Technologies™ ...

Page 2

... Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 General Description Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 1. Jitter Removal by Input Equalization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. M21120 Crosspoint Switch Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 1. Terminal Functional Descriptions( Table 2. High-speed PCML RF Electrical Specifications ( Table 3. +3.3V CMOS DC Electrical Specifications (1) (2) ( Table 4. +2.5V CMOS DC Electrical Specifications (1)( Table 5. +3.3V PCML DC Electrical Specifications ( Table 6 ...

Page 3

... Figure 9. Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 10. Package Cross Section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 11. Package Bottom View with Ball Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 18. Ball List Sorted by Ball Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 19. Ball List Sorted by Ball Name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization Mindspeed Technologies™ M21120 Page ...

Page 4

... Fibre Channel, and 10x Fibre Channel) 10 GbE parallel, GbE, and Infiniband networks Packet Switching High-speed Automated Test Equipment The M21120 is available in a 580-terminal, 35 mm, CDBGA (Cavity Down Ball Grid Array) package, with a case tempera- ture range of 0 º ºC, as shown in Terminal functional descriptions are listed in ...

Page 5

... Figure 2. M21120 Crosspoint Switch Functional Block Diagram xds/sclk a[7:0] d[5:0] d[6]/di d[7]/do ser/xpar xtest trig dotxp/n clktxp/n xentx inp/n[0] inp/n[1] Equalization inp/n[33] xindis Table 1. Terminal Functional Descriptions Name inp[0:33] Positive differential high-speed input data inn[0:33] Negative differential high-speed input data outp[0:33] Positive differential high-speed output data ...

Page 6

... Trig output has a voltage swing of 150 mV peak-to-peak. 4. Internal pull-up resistors on all CMOS inputs unless otherwise noted. 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization (4) (Sheet Function Analog and Digital Power Mindspeed Technologies™ M21120 Notes Type Signal – I CMOS – I CMOS – ...

Page 7

... Gbps Crosspoint Switch with Input Equalization (1) Notes Minimum 0 — — — — — — — — — Table 7. Mindspeed Technologies™ M21120 Typical Maximum Units — 3.2 Gbps — 7.2 ps — — 7.7 ps — 120 ps –15 — ...

Page 8

... Typical Maximum 100 — 1200 –500 — V +100 DD DD 750 — 950 — — V +300 DD –800 — — DD –35 — M21120 Units µA µA Units µA µA Units Page ...

Page 9

... P-P (1) Notes Minimum 2, 5 100 500 DD 4 700.0 5 — –800 DD — — 470 DD Table 7. Mindspeed Technologies™ M21120 Typical Maximum Units — V –410 mV DD Typical Maximum Units — 1200 mV — 100 mV DD — 900.0 mV — V +300 mV DD — — ...

Page 10

... Case to ambient thermal resistance Notes: 1. M21120 will operate with supply voltages between 2.5 V– 5% and 3 10%. All power supplies should be tied to the same level within the device. 2. Please refer to the M21120 thermal application note for thermal management and heatsink recommendations for this device. ...

Page 11

... ESD Human body model (low-speed) ESD Human body model (high-speed) ESD Charge device model Note: 1. Normal operating conditions for the M21120 are specified in product reliability. 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization (1) Item Minimum Table 7. Extended exposure to Absolute Maximum Ratings in Mindspeed Technologies™ ...

Page 12

... E8h) will update the ACL with the current ICL contents and change the switch state. 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization Table 10 Mindspeed Technologies™ M21120 Figure 3 illustrates the timing for a parallel defines the timing specifications for parallel write Page ...

Page 13

... Srw_w Hrw_w t t TxDS_lo_w TxDS_hi_w Address t t SA_w HA_w Data Write Sets Write Access t t Hcs_r Scs_r t t Hrw_r Srw_r t t TxDS_lo_r TxDS_hi_r Address t t HA_r SA_r Data Read t A2out Read Access Mindspeed Technologies™ M21120 t Setw Page ...

Page 14

... Address Setup before Falling Edge of xDS tHA_r Address Hold after Rising Edge of xDS ta2out Address Valid to Data Valid (on Read) 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization Description Minimum Description Minimum Mindspeed Technologies™ M21120 Typical Maximum 5 ns — — — — — ...

Page 15

... ICL. Serial I/O Overview To configure the M21120 for the serial programming mode, the hardware pin Ser/xPar must be high. A serial I/O operation is initiated when xCS transitions from a high state to a low state. Data is shifted in on SDI on the falling edge of SCLK, and shifted out on SDO on the rising edge of SCLK ...

Page 16

... On each falling edge of SCLK, the 10-bits consisting and the 8-bit ADDR are written to the serial input shift register of the M21120. On the first rising edge following the address LSB, the SB and 8-bits of the DATA are shifted out on SDO. The first bit output on SDO for a read operation is always 0 ...

Page 17

... Mindspeed Technologies for internal testing and should be tied to V M21120 after initial power up. To issue a hardware reset to the M21120, the xRST pin should be pulled low for a minimum and then pulled to a high state. This will reset all registers to their default settings. Both the ICL and ACL are cleared resulting in the switch core set to broadcast channel 0 to all channels ...

Page 18

... Initialization Sequence The M21120 requires a hardware reset after the initial power up. Following either a software or a hardware reset, the following sequence should be executed in order to correctly initialize the M21120 for operation. 1. Set bit 2 of register EB to "1" 2. Write data = 44h to registers 22h-43h Table 13 ...

Page 19

... Mindspeed Technologies™ M21120 Bit 1: Enable/ Bit 0: Enable/Dis- Disable Input able Output en_in en_out 0 en_out en_in en_out 0 en_out en_in en_out 0 en_out en_in en_out ...

Page 20

... PRBS receiver, which can be obtained by passing the data through a clock and data recovery device and connecting the CDR clock and data outputs to the M21120 PRBS Rx inputs. ClkRxP/ ClkRxN clock and DiRxP/DiRxN data are both gated by the external pin xEnRx or the pwr_rx bit of the PRBS power/enable (ADDR=E0h) register ...

Page 21

... The data used to program registers 00h through 21h in shown in Table 15: 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization n -1 pattern. D1 and D0 (rxlen) set the length of the Table 16 and Table 17 are offset with respect to the actual channel number as Mindspeed Technologies™ M21120 Page ...

Page 22

... Table 15. Input Channel Number Offsets for Programming Input Channel Selection Registers (00–21h) M21120 Input Programming Data Value Channel No. (Decimal ...

Page 23

... Gbps Crosspoint Switch with Input Equalization (1) ( D[6] D[5] D[5] D[6] D[5] D[5] D[6] D[5] D[5] D[6] D[5] D[5] pwr_trig rxerr[7] rxerr[6] rxerr[5] rxerr[4] txlen[1] pat[7] pat[6] pat[5] pat[4] Mindspeed Technologies™ M21120 D[3] D[2] D[1] D[3] D[2] D[1] D[3] D[2] D[1] D[3] D[2] D[1] ioen[0] ioen[2] ioen[1] ioen[0] ioen[0] ioen[2] ioen[1] ioen[0] ioen[0] ioen[2] ioen[1] ioen[0] ioen[2] ioen[1] ioen[2] ...

Page 24

... Gbps Crosspoint Switch with Input Equalization (1) ( pat[15] pat[14] pat[13] pat[12] pat[22] pat[21] pat[20] muxdrv coredrv[1] coredrv[0] rev[7] rev[6] rev[5] rev[5] 18. Mindspeed Technologies™ M21120 pat[11] pat[10] pat[9] pat[19] pat[18] pat[17] pat[16] xset[1] xset[0] 1 (Note 5) en_refs ifdrv[1] Ifdrv[0] clkdrv[1] clkdrv[0] paddrv[1] paddrv[0] rev[3] ...

Page 25

... TX PRBS enabled 0: RX PRBS disabled (default PRBS enabled E1h: PRBS Control 0: normal operation (default) 1: reset TX shift register 0: normal operation (default) 1: reset RX shift register E2h: PRBS RX error count PRBS RX error count register (read only) Mindspeed Technologies™ M21120 Table 15.) Table 13) Page ...

Page 26

... Selects the xSET mode. 00: ACL latches are transparent. Any switch setting written immediately affects the core configuration. (default) 01: ACL latches are controlled through register e8h (software xSET). 10: ACL latches are controlled by pin xSET (hardware control). Mindspeed Technologies™ M21120 Page ...

Page 27

... WRITE SPEED (Write slope control) 00: high drive (default) 01: medium drive 10: low drive 11: tiny drive CLOCK distribution slope 00: high drive (default) 01: medium drive 10: low drive 11: tiny drive Mindspeed Technologies™ M21120 Page ...

Page 28

... EFh: software reset Software reset: Needs two consecutive Writes with DATA = 01h. If second Write is not a reset, register is cleared. Default (DATA = 00h) third Write required to bring out of reset. F0h: Chip revision Contains the chip revision ( read only ) Mindspeed Technologies™ M21120 Page ...

Page 29

... Package Information Figure 9 gives the overall package dimensions, M21120 package showing the ball assignments. All dimensions in the following illustrations are in millimeters. Figure 9. Package Dimensions A1 Ball Location 2.14mm 0.5mm Figure 10. Package Cross Section Optional Edge (Routed) 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization ...

Page 30

... Gbps Crosspoint Switch with Input Equalization 33mm Mindspeed Technologies™ Location M21120 A1 Ball 33mm Page ...

Page 31

... L30 nc G32 nc L31 nc G33 nc L32 nc G34 avss L33 inp5 H1 ainvdd L34 inp4 H2 inn9 M1 inn3 H3 inn8 M2 avss H4 ainvdd M3 d[4] H5 inp10 M4 M21120 Name Ball M30 nc M31 ainvdd M32 nc M33 nc M34 ainvdd N1 avss N2 inp11 N3 inn10 N30 avss N31 nc N32 nc N33 nc N34 ...

Page 32

... AL24 aoutvdd AM30 nc AL25 nc AM31 avss AL26 nc AM32 nc AL27 dotxn AM33 nc AL28 ainvdd AM34 avss AL29 nc AN1 M21120 Name Ball xindis AN2 avss AN3 avss AN4 outp1 AN5 outn1 AN6 avss AN7 outp9 AN8 outn9 AN9 avss AN10 outp17 AN11 outn17 ...

Page 33

... AP22 nc AP23 nc AP24 aoutvdd AP25 nc AP26 nc AP27 aoutvdd AP28 nc AP29 nc AP30 aoutvdd AP31 clktxp AP32 nc AP33 nc AP34 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization Name Ball Name Ball Mindspeed Technologies™ Name Ball Name Ball M21120 Name Ball Page ...

Page 34

... inp7 inp8 inp9 inp10 inp11 inp12 inp13 P1 nc M21120 Ball AA4 AB3 AC2 AC1 AD4 AE3 AF2 AF1 AG4 AH3 AJ2 AJ1 A4 A21 A22 A24 A25 A27 A28 A30 A31 ...

Page 35

... AL25 nc AP33 outp1 AL27 nc AP34 outp2 AL28 nc AL4 outp3 AL31 nc AN1 outp4 AL32 outn0 A7 outp5 AL33 outn1 AN6 outp6 M21120 Ball B7 AP6 C8 AL7 D9 AM8 A10 AN9 B10 AP9 C11 AL10 D12 AM11 A13 AN12 B13 AP12 C14 AL13 D15 AM14 A16 ...

Page 36

... B15 outp27 AP14 outp28 C16 outp29 AL15 outp30 D17 outp31 AM16 outp32 A18 outp33 AN17 perror D33 r/xw C5 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization Name Ball Name Ball Mindspeed Technologies™ Name Ball Name Ball Name M21120 Ball Page ...

Page 37

... Mindspeed™ sales office listed below. For literature send email request to literature@mindspeed.com. 21120-DSH-001-B, 3/27/ 3.2 Gbps Crosspoint Switch with Input Equalization Date 2/5/02 Initial release. 2/9/02 Revision B. 3/21/03 Changed document number to new numbering system. Revised parallel timing diagrams and specifications tables and CMOS DC electrical specifications tables. Mindspeed Technologies™ M21120 Package Data Page ...

Page 38

... Phone: +86-230-0420 Fax: +86-230-0421 China-Central and North Phone: +(86-21) 6350-5701 Fax: +(86-21)-6350-5702 Korea Phone: +82-2-528-4301 Fax: +82-2-528-4302 Mindspeed Technologies Japan Company Limited. Phone: +(81-3) 5371 1520 Fax: +(81-3) 5371 1501 Mindspeed Technologies™ Europe Europe Central Germany, Switzerland Eastern Europe Phone: +(49) 89 829 1320 ...

Related keywords