zl30414 Zarlink Semiconductor, zl30414 Datasheet - Page 6

• Manufacturer Part Number: zl30414
• Description: Sonet/sdh Clock Multiplier Pll
• Manufacturer: Zarlink Semiconductor

1.4
The voltage-controlled oscillator (VCO) receives the filtered error signal from the Loop Filter, and based on the
voltage of the error signal generates a primary frequency. The VCO output is connected to the "Frequency Dividers
and Clock Drivers" block that divides VCO frequency and buffer generated clocks.
1.5
The output of the VCO is used by the Output Interface Circuit to provide four LVPECL differential clocks at
622.08 MHz, one CML differential clock at 155.52 MHz and a single-ended 19.44 MHz output clock. This block
provides also a 19.44 MHz feedback clock that closes PLL loop. Each output clock can be enabled or disabled
individually with the associated Output Enable pin.
To reduce power consumption and achieve the lowest possible intrinsic jitter the unused output clocks must be
disabled. If any of the LVPECL outputs are disabled they must be left open without any terminations.
VCO
Output Interface Circuit
C622oP/N-A
C622oP/N-B
C622oP/N-C
C622oP/N-D
C155oP/N
C19o
Output Clocks
Table 1 - Output Enable Control
Zarlink Semiconductor Inc.
ZL30414
6
C622oEN-A
C622oEN-B
C622oEN-C
C622oEN-D
C155oEN
C19oEN
Output Enable Pins
Data Sheet