m21353 Mindspeed Technologies, m21353 Datasheet - Page 27

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m21353

Manufacturer Part Number
m21353
Description
4.25 Gbps Twelve-channel Backplane Equalizer And Driver With 12x12 Crosspoint Switch
Manufacturer
Mindspeed Technologies
Datasheet
5.9
The 12x12 crosspoint switch core is configured through the Active Switch Configuration, Intermediate Switch
Configuration #1, and Intermediate Switch Configuration #2 registers. The switch supports multicast and broadcast
modes.
The current switch configuration is stored in the “Active Switch Configuration” (ASC) registers, addresses 08h-0Dh.
The switch configuration is updated immediately when a write operation to these registers takes place. One ASC
register controls two output channels, so two crosspoint switch paths can be updated at a time by writing directly to
the ASC registers. To configure a crosspoint switch path, the input channel is used as the register data value, and
the output channel is the register address that is used. For example, to configure the crosspoint core so that input
channel 2 is routed to output channel 0, write data = '0010' into register 0Dh[3:0]. Register 0Dh contains the active
switch configuration for outputs 0 and 1, so the data for the desired input channel for output channel 1 would also
need to be written into register 0Dh[7:4].
To allow for immediate reconfiguration of one to all crosspoint switch paths, there are two “Intermediate Switch
Configuration” (ISC#1 and ISC#2) registers located in addresses 0Eh-19h. These registers allow for a new
crosspoint switch configuration to be loaded into the registers in advance. When a “strobe” event occurs, the ASC
registers will be updated with the contents from the appropriate “ISC” register, and the entire switch core
configuration is updated. The switch core can be updated through either a software “strobe” in register 05h, or a
hardware strobe by toggling the xSEL hardware pin. When a software strobe is being used, bit 7 of register
address 05h is used to select which ISC register is used when the ASC is updated. When the M21353 is
configured for hardware strobe mode by setting bit 3 of register address 03h to "1", the xSEL hardware pin is used
to update the ASC contents. The device can be configured in two different hardware strobe modes with bit 6 of
register address 05h. With this bit set to "0", ISC #1 is the active switch configuration when xSEL is H, and ISC #2
is the active switch configuration when xSEL is L. With this bit set to "1", a H to L transition on the xSel pin will
update the active switch configuration register with ISC #1 or ISC #2 as determined by bit 7 of register address
05h.
The switch core can be programmed in two modes, group switch mode or lane switch mode. In group switch mode,
four high-speed channels are treated as one group and switched together. Group 0 includes Input/Output channels
0,1, 2, and 3; Group 1 includes Input/Output channels 4, 5, 6, and 7; Group 2 includes Input/Output channels 8, 9,
10, and 11.
In lane switch mode, each high speed channel is independent and switched individually. By default, the device is in
group switch mode with the following switch core configuration:
The group switch configuration can be updated by writing to the group switch ASC, ISC #1, and ISC #2 registers,
addresses 08h-19h.
If the M21353 is being used in a protection switching application, two alternate switch states can be stored in each
ISC register, and the HW strobe can be used to select between the two switch settings. This mode is enabled by
default. Figures
default group switch mode settings.
21353-DSH-001-B
5-3
Crosspoint Switch Core
Input group 0 ---> Output group 1
Input group 1 ---> Output group 0
Input group 2 ---> Output group 2
and
5-4
show how the M21353 can be used in a protection switching application using the
Mindspeed Technologies
®
Functional Description
27

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