tea5766uk NXP Semiconductors, tea5766uk Datasheet
![no-image](/images/manufacturer_photos/0/4/487/nxp_semiconductors_sml.jpg)
tea5766uk
Available stocks
Related parts for tea5766uk
tea5766uk Summary of contents
Page 1
IMPORTANT NOTICE Dear customer from August 2 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless result, the following changes are applicable to the attached document. ● Company name - NXP ...
Page 2
... Stereo FM radio + RDS Rev. 01 — 22 March 2007 1. General description The TEA5766UK is a single chip electronically tuned FM stereo radio with Radio Data System (RDS) and Radio Broadcast Data System (RBDS) demodulator and RDS/RBDS decoder, for portable application with fully integrated Intermediate Frequency (IF) selectivity and FM demodulation ...
Page 3
... Sleep mode; only in I C-bus; BUSEN = HIGH V V VREFDIG CCD Standby mode device meets all specifications TEA5766UK functional, specification not guaranteed and VCO supply current on pin V CCA Description wafer level chip-size package; 25 bumps; 3.3 Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS ...
Page 4
... LNA C5 GND(RF) prog. div out ref. div out TUNING SYSTEM VCO LOOPSW CPOUT LO1 LO2 V CC(VCO) Fig 1. Block diagram MPXOUT GNDA B5 TEA5766UK SOFT DEMODULATOR MUTE LEVEL IF COUNTER ADC MPX DECODER MUX SW PORT A5 B1 SWPORT VAFL VAFR TMUTE ...
Page 5
... E1 input/output and control interface data line E2 control interface clock line input E3 digital reference voltage for control interface Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS TEA5766UK 001aaf443 [1] © NXP B.V. 2007. All rights reserved ...
Page 6
... TEA5766UK_1 Product data sheet Pin description …continued Pin Description E4 multiplex signal (MPX) output E5 left audio output E6 right audio output Section 13.2. Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Section 10.1. Table 15. Calculation of this 14-bit © NXP B.V. 2007. All rights reserved ...
Page 7
... The Lock Detect (LD) bit in register TUNCHK will be set after PLL lock detection (see Table 18). 7.6 Band limits The TEA5766UK can be switched to the Japanese FM band or the US/Europe FM band. Bit BLIM in register TNCTRL (see (87.5 MHz to 108 MHz) and BLIM set to logic 1 enables the Japanese band (76 MHz to 90 MHz). ...
Page 8
... Once tuned, the IF count period is always 15.6 ms. 8.2.5). The threshold value is relative to the search stop level. The hysteresis Table 20 and Section 8.2.5). Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS 16). When the IF count period is set to 2 ms, Section 8.2.5). A flag will be set to Table © NXP B.V. 2007. All rights reserved. ...
Page 9
... Left Hard Mute (LHM) or Right Hard Mute (RHM) in register TESTREG (see both set). When one output is muted the stereo decoder switches to mono. When he TEA5766UK is in Standby mode the audio outputs are in high-impedance state (see Table 4). ...
Page 10
... Standby mode With the PUPD[1:0] (power-up/power-down) bits the radio can be put in Standby mode. Standby mode is defined as where the TEA5766UK has all supply voltages available but the circuits are powered down via software (PUPD) or after power-on reset. The RDS part can be turned off separately, using one of the PUPD bits ...
Page 11
... BLFLAG goes to logic 1. A search always stops with bit FRRFLAG being set and a hardware interrupt. After this interrupt the TEA5766UK will keep its status and will not update the INTREG, FRQCHK and TUNCHK tuner registers for a period of 15.6 ms. The state of the TEA5766UK can be checked by reading tuning registers: INTREG, FRQCHK and TUNCHK ...
Page 12
... BLMSK or FRRMSK set Figure 3). Indication for image frequency interference can image on low-side wanted channel switch LO from high-side to low-side Section Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS image on high-side 001aab460 7.5). (see Table 4). A hard mute © NXP B.V. 2007. All rights reserved. ...
Page 13
... IF OK true AHLSI true false BLFLAG = 0 BLFLAG = 0 FRRFLAG = 1 FRRFLAG = 1 no mute mute Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS false search mode true false search up true increment current_pll decrement current_pll by 100 kHz by 100 kHz false band limit true ...
Page 14
... The level measurement will start 15.6 ms after the tuning algorithm, so bit LEVFLAG and the RSSI information will be updated 15.6 ms after the algorithm. The state of the TEA5766UK can be checked by reading registers: INTFLAG, FRQCHK, IFCHK and LEVCHK. states after an RDS update and 7 ...
Page 15
... IFFLAG 2 INTMSK (INTREQ byte C-bus register byte 1R/byte 0W bit allocation LSYNCMSK IFMSK Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS false set LEVFLAG false reset 'old' PLL setting wait for PLL to settle FRRFLAG = 1 BLFLAG = 0 not mute (PLL is old frequency) ...
Page 16
... TEA5766UK_1 Product data sheet 8.2. When these flags are set they can also cause the INTX to go active 8.2.3). ) has a maximum value specifi Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Table 8. Figure 6). Bit LSYNCMSK has Figure 6 and shows Section 13 ...
Page 17
INTFLAG data device S R ack 0R data ack address interrupt event ( interrupt flag bit interrupt mask bit INTX (1) Interrupt events that occur outside of the region A-B set their respective flag bits in ...
Page 18
INTFLAG MOSI R/ subaddress data W CS interrupt event (1) A interrupt flag bit interrupt mask bit INTX (1) Interrupt events that occur outside of the region A-B set their respective flag bits in the normal way immediately and can ...
Page 19
... The action of the TEA5766UK depends on the status of the LSYNCMSK bit in this is set then the loss of synchronization causes the LSYNCFL to go logic 1 and a hardware interrupt is generated. The RDS part of the TEA5766UK is set to idle and waits for the host processor to initiate a new synchronization search by setting the NWSY bit as ...
Page 20
... NXP Semiconductors If the LSYNCMSK bit is logic 0 and synchronization is lost the TEA5766UK automatically starts a new synchronization search. It will not generate a hardware interrupt. The host processor can wait until the RDS decoder is synchronized again; this will be indicated by the DAVFLG and the SYNC status bit (this requires the DAVMSK being set). ...
Page 21
... TEA5766UK_1 Product data sheet and Table 6. This bit is cleared by a read of byte 1R. Section Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Table 20. Then the level ADC starts to run Table Table 5 13.4. So when a flag is set and not masked it © NXP B.V. 2007. All rights reserved. ...
Page 22
... DAVFLG is set. This is shown in the bus registers. TEA5766UK_1 Product data sheet (1) (2) ( (4) (5) Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS read clears INTX Figure 9. The DAVFLG is reset by a read of © NXP B.V. 2007. All rights reserved. ( 001aaf446 ...
Page 23
... DOVF bit will be reset. The diagram assumes that block synchronization has been achieved and that no other interrupt flags are being set. TEA5766UK_1 Product data sheet Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS © NXP B.V. 2007. All rights reserved ...
Page 24
... A 1 RDSR4. The block considered as a new block. a read must be performed before D 1 finishes within 21 ms after DOVF set to logic 1. and BP registers. decoded. Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS read 9. ...
Page 25
... BBG = 3: synchronization is reached after receiving 1 good block and after bad blocks and again a good block. After three bad blocks there will be no synchronization and the counters will be reset waiting for a new good block. Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS A B ...
Page 26
... DAVFLG (2) t (3) p INTX interrupt read read access (case 1) t read is copied to the BL register shortly before Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS ( (4) is decoded register. © NXP B.V. 2007. All rights reserved 001aaf447 ...
Page 27
... BL and BL to BP. 2 will be lost. 1 read of BP register, however D and A 1 buffer. Hence DOVF is set again. To prevent this, an extra read must be performed after reading (a). Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS (2) ...
Page 28
... When the BBC value is equal to the BBL value, synchronization is lost. The SYNC bit will become logic 0 and the LSYNCFL is set to signal the loss of synchronization. The TEA5766UK will now automatically initiate a new synchronization search. Each time when a good block is decoded the GBC value is incremented. When the GBC value is equal to the GBL value both counters (BBC and GBC), are set to 0 and a new count starts ...
Page 29
... Remark: DAVN sets the INTX one-shot generator when DAVMSK = 1. Unlike INTX, DAVN is not cleared by a read of the mask register. TEA5766UK_1 Product data sheet Section 9.1 to Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Table 19). Section 9.3. When the registers are Figure 13 describes © ...
Page 30
... Blocking DAVFLG: at end of reading byte 15R or byte 17R (DAV-A, B/C) DAVFLG is forced to zero. Only after reading byte 19R DAVFLG is released again. If synchronous reading is performed using TEA5766UK generated interrupts, this problem does not occur. To prevent undefined situations, byte 12R to byte 19R should always be read in one action immediately after each other. ...
Page 31
... NXP Semiconductors 9.6 Error detection and reporting The TEA5766UK must report information on the number of errors corrected in the last and previously decoded blocks. This is reported in the ELB[1:0] and EPB[1:0] fields as shown in Table During synchronization search the error correction is disabled for detection of the first ...
Page 32
... Minimum HIGH-level input: V 10.2.1 Data transfer to the TEA5766UK • The data transfer has the order shown in address indicates a WRITE operation to the TEA5766UK, indicated by the R/W bit of the I • Bit 7 of each byte is considered the MSB and has to be transferred as the first bit of the byte. • ...
Page 33
... Standby mode, the TEA5766UK keeps its normal operation, but is isolated from the bus lines possible to operate the TEA5766UK with pin BUSEN hard wired to pin VREFDIG and have the bus interface always active. Power-on reset: the mute is set, all other bits are set default according to the tables in ...
Page 34
... START condition: > 600 ns. SU;STA t = data hold time: 300 ns < t HD;DAT Remark: 300 ns lower limit is added because the TEA5766UK has no internal hold time for the SDA signal data set-up time: > 100 ns. If TEA5766UK is used in a standard mode I SU;DAT t = set-up time for STOP condition: > ...
Page 35
... MHz. Data transfer is possible when signal CS (pin BUSEN) is LOW. When pin BUSEN is HIGH, the clock input line is disabled internally and the serial output of the TEA5766UK is in 3-state. The data transfer consists of packages of 8 bits data. First the address byte is shifted in, followed by 2 data bytes, which gives a total of 24 bits ...
Page 36
... SPIF SPICLKL SPIR t SPICLKH t SPIOH t SPIDV t SPIDH < 50 ns. SPIR < 50 ns. SPIF < 167 ns. SPIDIS Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS D14 D13 D12 D11 SPILAG t SPIDH SLAVE LSB/MSB OUT NOT DEFINED t t SPIDSU SPIDH LSB/MSB IN © NXP B.V. 2007. All rights reserved. ...
Page 37
... C byte 0R + byte 1R/byte 0W bit description Access Reset Description value RDS data is available R 0 internal use synchronization is lost count is not correct Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS R/W access Reset Write [1] 0W R/W 0000h R/W 8000h R/W 08D2h R - ...
Page 38
... FM and RDS on R Japan FM band 76 MHz to 90 MHz 0 = US/Europe FM band 87.5 MHz to 108 MHz R software port output is bit FRRFLAG 0 = software port output is bit SWP Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS …continued © NXP B.V. 2007. All rights reserved ...
Page 39
... Access Reset Description value - - not used R - frequency found 2 C byte 8R + byte 9R Access Reset Description value count PLL tuning time-out 0 = PLL has settled R - level count Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS …continued © NXP B.V. 2007. All rights reserved ...
Page 40
... SNCLEV switches the starting point mono/stereo blending R software Test mode and software port outputs according to Table normal operation R/W 0 test bits; pins SWPORT and INTX Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Table 21 describes selection of signals available at © NXP B.V. 2007. All rights reserved ...
Page 41
... R - number of errors for last processed block errors 01 = maximum 2 bits 10 = maximum 5 bits 11 = uncorrectable Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS LHSW = 1 0 (SNR = 0 dBA) 1 (SNR = 34 dBA) 3 (SNR = 40 dBA) 5 (SNR = 46 dBA kHz, mod Pin Bit TM SWPORT ...
Page 42
... C byte 16R + byte 17R Access Reset Description value R - previous RDS data byte 2 C byte 18R + byte 19R Access Reset Description value R - bad block count R - good block count - - not used Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS © NXP B.V. 2007. All rights reserved ...
Page 43
... ID code = 015h manufacturer ID available chip has byte 26R + byte 27R Access Reset Description value R - chip identification code = 5766h Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS 2 C-bus mode © NXP B.V. 2007. All rights reserved ...
Page 44
... TEA5766UK functional, specification not guaranteed electrostatic machine model discharge voltage human body model pin SWPORT any other pin charged device model ...
Page 45
... Hz to 15000 Hz Conditions MHz to 108 MHz MHz to 108 MHz RF switching level Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Min Typ 0 0 CC(VCO) Section 13.4 are valid under restriction of the ...
Page 46
... V < ms; IFCTC = 1 2 ms; IFCTC = load load C < < 150 A load I = 150 A load V = 1.8 V SWPORT SWPORT Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Min Typ Max - - 8191 2048 - - - 100 - - ...
Page 47
... EN 55020; image rejection defined as difference between image and co-channel response; de-emphasis 50 s Figure 20 deviation from average curve extrapolated average SMUTE = 1 Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Min Typ Max VREFDIG VREFDIG 0.2 ...
Page 48
... IEC filter + A-weighting filter mono stereo 6.75 kHz pilot relative 22.5 kHz kHz (mono); mod [ de-emphasis = 50 s; IEC filter + A-weighting filter Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Min Typ Max 5 5 250 350 400 500 - - 1 ...
Page 49
... and including 9 % pilot kHz; mod MST = 0; SNC = 1; SNCLEV = kHz; including 9 % pilot kHz; SNC = 0; spread due mod to RSSI variation kHz; including 9 % pilot kHz; SNC = 0 mod Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Min Typ Max - 0.4 0.8 - 0.4 0.8 - 0.4 0.8 - ...
Page 50
... G G start(ADC the starting point of the curve. Taking the starting point the curve shows a ADC(start) monotone increase, increasing with the average step size G from the average curve is G. Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Min Typ Max - - ...
Page 51
... LNA 47 pF GND(RF) C5 TUNING SYSTEM VCO LOOPSW CPOUT LO1 10 nF 100 100 k Fig 21. Application diagram GNDA B5 POWER TEA5766UK SUPPLY IF SOFT LIMITER DEMODULATOR MUTE LEVEL IF COUNTER ADC DECODER prog. div out ref. div out MUX SW PORT LO2 V CC(VCO) ...
Page 52
... Product data sheet List of components 120 and 100 k 27 pF, 47 pF, 100 pF and 100 nF tolerance 10 % maximum Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Type Murata LQW15ANR12J00 or equivalent, Qmin = 100 MHz), tolerance 5 % Murata LQW15AN47NJ00 or equivalent, Qmin = 250 MHz), tolerance 5 % tolerance 10 % maximum © ...
Page 53
... 3.35 3.30 0.5 2.5 2 0.2 3.30 3.25 REFERENCES JEDEC JEITA Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS detail 0.15 0.01 0.04 0.02 EUROPEAN PROJECTION TEA5766 ISSUE DATE 06-02-23 06-03-03 © NXP B.V. 2007. All rights reserved ...
Page 54
... Lead-free process (from J-STD-020C) Package reflow temperature ( C) 3 Volume (mm ) < 350 260 260 250 Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Figure 23) than a PbSn process, thus Table 35 and 36 350 220 220 350 to 2000 > 2000 260 260 ...
Page 55
... Product data sheet Figure 23. maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS peak temperature time 001aac844 © NXP B.V. 2007. All rights reserved ...
Page 56
... Limits and methods of measurement, May 2002. [7] RDS: The Radio Data System — Dietmar Kopitz and Bev Marks. TEA5766UK_1 Product data sheet 2 C-bus specification — version 2.1, January 2000. Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS © NXP B.V. 2007. All rights reserved ...
Page 57
... NXP Semiconductors 18. Revision history Table 37. Revision history Document ID Release date TEA5766UK_1 20070322 TEA5766UK_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS Supersedes - © NXP B.V. 2007. All rights reserved ...
Page 58
... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 22 March 2007 TEA5766UK Stereo FM radio + RDS © NXP B.V. 2007. All rights reserved ...
Page 59
... Data overfl 9.5 RDS flag behavior during read action . . . . . . 28 9.6 Error detection and reporting . . . . . . . . . . . . . 30 9.7 RDS data - reading from registers . . . . . . . . . 30 10 Control interface 10.1 Selection between I 2 10.2 I C-bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 10.2.1 Data transfer to the TEA5766UK . . . . . . . . . . 31 2 10.2.2 I C-bus output driving characteristics 10.2.3 I C-bus timing diagram 10.3 SPI-bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 11 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 11.1 Register map . . . . . . . . . . . . . . . . . . . . . . . . . 36 11.2 Register description ...
Page 60
... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 22 March 2007 Document identifier: TEA5766UK_1 ...