ml7214a-001 Oki Semiconductor, ml7214a-001 Datasheet - Page 22

• Manufacturer Part Number: ml7214a-001
• Description: Voip Codec
• Manufacturer: Oki Semiconductor

FEDL7214_001DIGEST-P
OKI Semiconductor
ML7214-001
PDNB
This is a power-down control input pin. A power-down state can be set by setting this pin to “0”. This pin
also functions as an LSI reset pin. To prevent an LSI operation error, use PDNB for the initial power-down
reset after power is applied. To put the LSI into a power-down state, fix PDNB to “0” for 250 µs or more.
LSI power-down reset can be performed by setting the software power down reset control register SPDN to “0”
→ “1” → “0”.
Power-down is released, the initial mode display register (READY) is set to “1” after 200 ms, and various
function setting modes (initial modes) are entered.
See Figure 1 for the timings of PDNB, AVREF, XO, and the initial mode.
(Note)
Turn on the power in a power-down state by PDNB.
When using the LSI by inputting a master clock to the XI pin, first maintain the power-down state (PDNB = 0)
until power is applied to the digital power supply (DVD0, 1, and 2) and the analog power supply (AVDD) (90%
or more) and the master clock is input to the XI pin, then release the power-down state (PDNB = 0 → 1) . In
this case also, fix PDNB to “0” for 250 µs or more.
DVDD0, DVDD1, DVDD2, and AVDD
These are power supply pins. DVDD0, DVDD1, and DVDD2 are connected to the power supply of a digital
circuit and AVDD is connected to a power supply of an analog circuit. Connect these pins near the LSI and
insert bypass capacitors of 10 µF (electrolysis type) and 0.1 µF (ceramic type) between DGND and AGND in
parallel.
DGND0, DGND1, DGND2, and AGND
These are ground pins. DGND0, DGND1, and DGND2 are connected to grounds of digital circuits and AGND
is connected to a ground of an analog circuit. Connect these pins near the LSI.
VREGOUT
This is an output pin of an internal regulator voltage (about 2.5 V).
Connect a capacitor of about 0.1 µF (ceramic type) in parallel to about 10 µF (ceramic or tantalum type) between
this pin and a ground pin.
VBG
This is a reference output pin for an internal regulator.
Connect a laminated ceramic capacitor of about 150 pF between this pin and a ground pin.
TST0, TST1, and TST2
These are input pins for testing. At normal use, input “0”.
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