73k222al ETC-unknow, 73k222al Datasheet - Page 7

• Manufacturer Part Number: 73k222al
• Description: V.22, V.21, Bell 212a, Single-chip Modem
• Manufacturer: ETC-unknow

REGISTER DESCRIPTIONS
Four 8-bit internal registers are accessible for control
and status monitoring. The registers are accessed in
read or write operations by addressing the A0, A1
and A2 address lines in serial mode, or the AD0,
AD1 and AD2 lines in parallel mode. In parallel
mode the address lines are latched by ALE. Register
CR0 controls the method by which data is
transferred over the phone line. CR1 controls the
interface between the microprocessor and the
REGISTER BIT SUMMARY
NOTE:
REGISTER
CONTROL
REGISTER
CONTROL
REGISTER
REGISTER
CONTROL
REGISTER
CONTROL
REGISTER
CONTROL
REGISTER
DETECT
TONE
REGISTER
ID
0
1
2
3
When a register containing reserved control
bits is written into, the reserved bits must be
programmed as 0's.
X = Undefined, mask in software
CR0
C R 1
C R 2
C R 3
DR
TR
ID
ADDRESS
AD2 - AD0
000
001
010
011
100
101
110
MODULATION
TRANSMIT
CONTROL
PATTERN
OUTPUT
OPTION
RXD
D7
1
X
X
X
ID
TRANSMIT
TRANSMIT
PATTERN
GUARD
TONE
D 6
0
I D
X
X
X
0
INTERRUPT
TRANSMIT
TRANSMIT
ANSWER
ENABLE
DETECT
RECEIVE
MODE
DATA
T O N E
D5
3
I D
X
X
7
SCRAMBLER
TRANSMIT
TRANSMIT
BYPASS
UNSCR.
MARKS
M O D E
73K222AL internal state. DR is a detect register
which provides an indication of monitored
modem status conditions. TR, the tone control
register, controls the DTMF generator, answer
and guard tones and RXD output gate used in
the
registers are read/write except for DR which is
read only. Register control and status bits are
identified below:
DTMF
DATA BIT NUMBER
D4
2
ID
THESE REGISTER LOCATIONS ARE RESERVED FOR
USE WITH OTHER K-SERIES FAMILY MEMBERS
V.22, V.21, Bell 212A, 103
modem
TRANSMIT
CONTROL
CARRIER
DETECT
DTMF3
MODE
CLK
D 3
1
X
Single-Chip Modem
initial
TRANSMIT
ANSWER
RESET
DTMF2
MODE
T O N E
connect
D2
0
X
73K222AL
PROGRESS
OVERSPEED
TRANSMIT
ENABLE
sequence.
DTMF1/
MODE
CALL
TEST
D1
1
X
ORIGINATE
ANSWER/
ANS TONE
GUARD/
DTMF0/
MODE
LONG
LOOP
TEST
All
D0
0
X
X
X