ak4642e AKM Semiconductor, Inc., ak4642e Datasheet - Page 49
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ak4642e
Manufacturer Part Number
ak4642e
Description
Stereo Codec With Mic/hp/spk-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4642E.pdf
(83 pages)
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ASAHI KASEI
Power supply for Speaker-Amp (HVDD) is 2.6V to 5.25V. In case of dynamic (electromagnetic) speaker (load resistance
< 50Ω), HVDD is 2.6V to 3.6V.
Note 23. Load impedance is total impedance of series resistance and piezo speaker impedance at 1kHz in Figure 33. Load
The DAC output signal is input to the Speaker-amp as [(L+R)/2]. The Speaker-amp is mono and BTL output. The gain is
set by SPKG1-0 bits. Output level depends on AVDD voltage and SPKG1-0 bits.
Note 40. The output level is calculated by assuming that output signal is not clipped. In actual case, output signal may be
MS0420-E-00
Speaker Output
capacitance is capacitance of piezo speaker. When piezo speaker is used, 10Ω or more series resistors should be
connected at both SPP and SPN pins, respectively.
clipped when DAC outputs 0dBFS signal. DAC output level should be set to lower level by setting digital
volume so that Speaker-Amp output level is 4.0Vpp or less and output signal is not clipped.
AVDD
3.3V
Load Capacitance (max)
Load Resistance (min)
Speaker Type
HVDD
SPKG1-0 bits
HVDD
3.3V
5.0V
00
01
10
11
Table 40. Speaker Type and Power Supply Range
SPKG1-0 bits
Table 42. SPK-Amp Output Level
ALC bit = “0”
00
01
10
11
00
01
10
11
Table 41. SPK-Amp Gain
+10.65dB
+12.65dB
+4.43dB
+6.43dB
Dynamic Speaker
2.6 ∼ 3.6V
- 49 -
30pF
8Ω
4.15Vpp (Note 40)
6.75Vpp (Note 40)
8.50Vpp (Note 40)
Gain
ALC bit = “0”
SPK-Amp Output (DAC Input = 0dBFS)
3.30Vpp
3.30Vpp
4.15Vpp
6.75Vpp
8.50Vpp
ALC bit = “1”
+12.65dB
+14.65dB
+6.43dB
+8.43dB
Piezo (Ceramic) Speaker
(LMTH1-0 bits = “00”)
50Ω (Note 23)
3µF (Note 23)
2.6 ∼ 5.25V
6.37Vpp (Note 40)
8.02Vpp (Note 40)
Default
ALC bit = “1”
3.11Vpp
3.92Vpp
3.11Vpp
3.92Vpp
6.37Vpp
8.02Vpp
[AK4642EN]
2005/09