ak4646 AKM Semiconductor, Inc., ak4646 Datasheet - Page 56
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ak4646
Manufacturer Part Number
ak4646
Description
Stereo Codec With Mic/spk-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4646.pdf
(79 pages)
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MS0557-E-02
Addr
Addr
02H
01H
PMPLL: PLL Power Management
MCKO: Master Clock Output Enable
M/S: Master / Slave Mode Select
MGAIN2-0: MIC-Amp Gain Control (Table 19)
PMMP: MPWR pin Power Management
DACL: Switch Control from DAC to Stereo Line Output
DACS: Switch Control from DAC to Speaker-Amp
BEEPS: Switch Control from MIN pin to Speaker-Amp
SPPSN: Speaker-Amp Power-Save Mode
0: EXT Mode and Power-Down (default)
1: PLL Mode and Power-up
0: Disable: MCKO pin = “L” (default)
1: Enable: Output frequency is selected by PS1-0 bits.
0: Slave Mode (default)
1: Master Mode
MGAIN1 bit is D5 bit of 03H.
0: Power-down: Hi-Z (default)
1: Power-up
0: OFF (default)
1: ON
0: OFF (default)
1: ON
0: OFF (default)
1: ON
0: Power-Save Mode (default)
1: Normal Operation
Register Name
Signal Select 1
Register Name
Power Management 2
When PMLO bit is “1”, DACL bit is enabled. When PMLO bit is “0”, the LOUT/ROUT pins go to AVSS.
When DACS bit is “1”, DAC output signal is input to Speaker-Amp.
When BEEPS bit is “1”, mono signal is input to Speaker-Amp.
When SPPSN bit is “0”, Speaker-Amp is on power-save mode. In this mode, SPP pin goes to Hi-Z and SPN
pin is outputs SVDD/2 voltage. When PMSPK bit = “1”, SPPSN bit is enabled. After the PDN pin is set to
“L”, Speaker-Amp is in power-down mode since PMSPK bit is “0”.
Default
R/W
Default
R/W
D7
R
0
0
SPPSN
R/W
D7
0
D6
R
0
0
BEEPS
R/W
D6
0
D5
- 56 -
R
0
0
DACS
R/W
D5
0
D4
DACL
R
0
0
R/W
D4
0
R/W
M/S
D3
D3
0
R
0
0
PMMP
R/W
D2
D2
R
0
0
0
MGAIN2
MCKO
R/W
R/W
D1
D1
0
0
[AK4646]
MGAIN0
PMPLL
2007/05
R/W
R/W
D0
D0
1
0