ak4646 AKM Semiconductor, Inc., ak4646 Datasheet - Page 22
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ak4646
Manufacturer Part Number
ak4646
Description
Stereo Codec With Mic/spk-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet
1.AK4646.pdf
(79 pages)
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■
When an external clock (12MHz, 13.5MHz, 24MHz or 27MHz) is input to MCKI pin, the MCKO, BICK and LRCK
clocks are generated by an internal PLL circuit. The MCKO output frequency is selected by PS1-0 bits (Table 9) and the
output is enabled by MCKO bit. The BICK output frequency is selected between 32fs or 64fs, by BCKO bit (Table 10).
MS0557-E-02
PLL Master Mode (PMPLL bit = “1”, M/S bit = “1”)
Mode
Table 9. MCKO Output Frequency (PLL Mode, MCKO bit = “1”)
0
1
2
3
AK4646
Table 10. BICK Output Frequency at Master Mode
BCKO bit
MCKI
MCKO
BICK
LRCK
SDTO
SDTI
PS1 bit
0
1
0
0
1
1
Figure 12. PLL Master Mode
256fs/128fs/64fs/32fs
32fs, 64fs
PS0 bit
BICK Output
1fs
Frequency
- 22 -
0
1
0
1
32fs
64fs
12MHz, 13.5MHz, 24MHz, 27MHz
MCKO pin
MCLK
BCLK
LRCK
SDTI
SDTO
256fs
128fs
64fs
32fs
(default)
DSP or μP
(default)
[AK4646]
2007/05