ak4555 AKM Semiconductor, Inc., ak4555 Datasheet - Page 14

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ak4555

Manufacturer Part Number
ak4555
Description
Low Power & Small Package 20bit ?? Codec
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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ASAHI KASEI
AK4555 requires careful attention to power supply and grounding arrangements to optimize performance.
(Please refer to AKD4555 Evaluation Board layout pattern.)
1.
2.
3.
4.
MS0363-E-01
1.6 ∼ 3.6V
Analog Supply
Layout Pattern Example
Digital Ground
Rch In
Lch In
VDD pin should be supplied from analog power supply on system, and VSS pin should be connected to analog
ground on system. The AK4555 is placed on the analog ground plane, and near the analog ground and digital ground
split. And analog and digital ground planes should be only connected at one point. The connection point should be
near to the AK4555.
VDD pin should be distributed from the point with low impedance of regulator etc.
The series resistors are prevent on the clock lines to reduce overshoot and undershoot. To avoid digital noise
coupling to analog circuit in the AK4555, a 10pF ceramic capacitor on MCLK pin is connected with digital ground.
0.1µF ceramic capacitors of VDD-VSS pins and VCOM-VSS pins should be located as close to the AK4555 as
possible. And these lines should be the shortest connection to pins.
Analog Ground
+
+
Mode Control
+
10u
0.1u
1
2
3
4
5
6
7
8
51
VCOM
AINR
AINL
VSS
VDD
DEM0
DEM1
SDTO
0.1u
Figure 7. Layout Pattern Example
AK4555
Top View
PWDAN
PWADN
AOUTR
AOUTL
- 14 -
MCLK
LRCK
SCLK
SDTI
16
15
14
13
12
11
10
9
10P
51
51
51
51
Reset &Power-down
Controller
[AK4555]
2005/08

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