ak4569 AKM Semiconductor, Inc., ak4569 Datasheet - Page 30

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ak4569

Manufacturer Part Number
ak4569
Description
20-bit Stereo Codec With Ipga & Hp-amp
Manufacturer
AKM Semiconductor, Inc.
Datasheet

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Addr
02H
WTM1-0: ALC Recovery Waiting Period (Table 7)
ZTM1-0: ALC Zero Crossing Timeout Period (Table 8)
LTM1-0: ALC limiter operation period (Table 6)
Register Name
Timer Select
WTM1
LTM1
ZTM1
Default
When zero crossing is disabled (ZELMN = “1”), the IPGA value is changed immediately by ALC limiter
operation. When the IPGA value is changed continuously, the change is done by the period specified by
LTM1-0 bits. Default: “00”.
WTM1-0 bits set the recovery operation period when any limiter operation does not occur during an ALC
operation. Default: “00”.
When IPGA output detects zero crossing or timeout, the IPGA value is changed by a µP WRITE operation,
ALC recovery operation, or ALC limiter operation. Default: “00”.
0
0
1
1
0
0
1
1
0
0
1
1
Table 6. ALC Limiter Operation Period at zero crossing disable (ZELMN bit= “1”)
WTM0
LTM0
ZTM0
0
1
0
1
0
1
0
1
0
1
0
1
Table 7. ALC Recovery Operation Waiting Period
1024/fs
1024/fs
D7
128/fs
256/fs
512/fs
128/fs
256/fs
512/fs
0.5/fs
0
0
1/fs
2/fs
4/fs
Table 8. Zero Crossing Timeout Period
D6
0
0
ALC Recovery Operation Waiting Period
128ms
128ms
125µs
250µs
500µs
8kHz
8kHz
16ms
32ms
64ms
8kHz
16ms
32ms
64ms
63µs
ALC Limiter Operation Period
Zero Crossing Timeout Period
ZTM1
- 30 -
D5
0
ZTM0
16kHz
16kHz
16kHz
125µs
250µs
16ms
32ms
64ms
16ms
32ms
64ms
31µs
63µs
8ms
8ms
D4
0
WTM1
D3
0
44.1kHz
44.1kHz
44.1kHz
11.6ms
23.2ms
11.6ms
23.2ms
2.9ms
5.8ms
2.9ms
5.8ms
11µs
23µs
45µs
91µs
WTM0
D2
0
Default
Default
Default
LTM1
D1
0
[AK4569]
LTM0
2005/07
D0
0

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