ak4569 AKM Semiconductor, Inc., ak4569 Datasheet - Page 24

• Manufacturer Part Number: ak4569
• Description: 20-bit Stereo Codec With Ipga & Hp-amp
• Manufacturer: AKM Semiconductor, Inc.

ASAHI KASEI
3) DAC → MOUT
(1) PDN pin should be set to “H” at least 150ns after the power is supplied.
(2) HPLMT, HPRMT and PMVCM bits should be changed to “1” after PDN pin goes to “H”.
(3) PMDAC and PMMO bits should be changed to “1” after HPLMT, HPRMT and PMVCM bits are changed to “1”.
(4) External clocks (MCLK, BICK, LRCK) are needed to operate DAC. When PMDAC= “0”, these clocks can be
(5) When PMMO bit is changed to “1”, pop noise is output from MOUT pin.
(6) Analog output corresponding to digital input has the group delay (GD) of 16.8/fs(=381µs@fs=44.1kHz).
(7) ATS bit sets transition time of digital attenuator. Default value is 1061/fs(=24ms@fs=44.1kHz).
MS0292-E-01
stopped. MOUT buffer can operate without these clocks.
Clock Input
PMDAC bit
DAC Internal
SDTI pin
PMMO bit
ATTL/R7-0 bit
MMUTE,
ATTM3-0 bit
MOUT pin
Power Supply
PDN pin
HPLMT,
PMVCM bit
HPRMT bit
State
PD(Power-down)
(1) >150ns
10H(MUTE)
(Hi-Z)
Figure 19. Power-up/down sequence of DAC and MOUT
Don’t care
00H(MUTE)
(3) >0
(2)
>0
(4)
(5)
(6) GD (7) 1061/fs
Normal Operation
FFH(0dB)
- 24 -
(6)
(7)
0FH(0dB)
00H(MUTE)
(5)
Don’t care
(Hi-Z)
PD
(5)
Normal Operation
(6)
(7)
FFH(0dB)
[AK4569]
2005/07